Datasheet

k2
T2
k1
k0
T1
O1
O2
DRC Input Level
DRC − Compensated Output
1:1 Transfer Function
Implemented Transfer Function
Region
0
Region
1
Region
2
M0014-01
TAS5548
www.ti.com
SLES270 NOVEMBER 2012
Figure 3-16 illustrates a typical DRC transfer function.
Figure 3-16. Dynamic Range Compression (DRC) Transfer Function Structure
The three regions shown in Figure 3-16 are defined by three sets of programmable coefficients:
Thresholds T1 and T2 define region boundaries.
Offsets O1 and O2 define the DRC gain coefficient settings at thresholds T1 and T2, respectively.
Slopes k0, k1, and k2 define whether compression or expansion is to be performed within a given
region. The magnitudes of the slopes define the degree of compression or expansion to be performed.
The three sets of parameters are all defined in logarithmic space and adhere to the following rules:
The maximum input sample into the DRC is referenced at 0 dB. All values below this maximum value
then have negative values in logarithmic (dB) space.
Thresholds T1 and T2 define, in dB, the boundaries of the three regions of the DRC, as referenced to
the rms value of the data into the DRC. Zero-valued threshold settings reference the maximum-valued
rms input into the DRC and negative-valued thresholds reference all other rms input levels. Positive-
valued thresholds have no physical meaning and are not allowed. In addition, zero-valued threshold
settings are not allowed.
CAUTION
Zero-valued and positive-valued threshold settings are not allowed and cause
unpredictable behavior if used.
Offsets O1 and O2 define, in dB, the attenuation (cut) or gain (boost) applied by the DRC-derived gain
coefficient at the threshold points T1 and T2, respectively. Positive offsets are defined as cuts, and
thus boost or gain selections are negative numbers. Offsets must be programmed as 32-bit (9.23
format) numbers.
Slopes k0, k1, and k2 define whether compression or expansion is to be performed within a given
region, and the degree of compression or expansion to be applied. Slopes are programmed as 28-bit
(5.23 format) numbers.
3.8.1 DRC Implementation
The three elements comprising the DRC include: (1) an rms estimator, (2) a compression/expansion
coefficient computation engine, and (3) an attack/decay controller.
Copyright © 2012, Texas Instruments Incorporated TAS5548 DAP Architecture 27
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