Datasheet

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S
S
Slave Addr
Slave Addr
AckAck
AckAck
Ack
Ack
DWMFT
AB
DataWordFormat(DWMFT)
0x00
0x01
SCLKIN
SCLKOUT1
SCLKOUT2
I CMASTER
SCL M=8
2
I CSAMPLING
CLOCKN=0
2
MICROPROCESSOR
CLOCK
DIGITAL AUDIO
PROCESSOR
CLOCK
SCL SDA
Ack
IOM
0xxxxxxx
00000000
01000010
00000000
00000000
Ack
Ack
Ack
AckAck
ICS IMS
000
w[1:0]
IW[2:0]
OW[2:0]
y[2:0]
x[2:0] z[2:0]
19
18 16
15
0
10
AB assigns TDM
time slotsforth
ose
TDM outputsinvo
lving two T
AS3108s.For
these outputformats,one
ofthe TAS3108
ch
ipsmustbe defined as
AB = ‘0’. The
other TAS3108 chip mustbe defined as
AB
= ‘1’.
NOTE: Inputandoutputwordsizes are
independent.
Sub-Addr
Sub-Addr
31
29 28 27 26 24 23 22 21
W
ord Size Code
IW2/OW
2
X
X
X
X
IW1/OW1
0
1
0
1
IW0/O
W0
0
0
1
1
32-bit
20-bit
16-bit
24-bit
Wo
rd Size
15
14
8
813
7
11
IM[3:0]
OM[3:0]
7
04
3
N[2:0]
M[3:0]
0
6
3
2
0
1
2
3
4
5
6
7
MUX
÷32
÷64
÷128
÷192
÷256
÷384
÷512
÷32
0
1
MUX
1
0
MUX
1
0
MUX
0
1
2
3
4
5
6
7
MUX
÷3
÷4
÷6
÷8
÷16
÷32
÷2
0
1
2
3
÷4
÷2
1
0
MUX
0
1
2
3
4
5
6
7
MUX
÷3
÷4
÷6
÷8
÷16
÷32
÷2
I C
MODULE
2
1/(M+1)
÷10
÷2N
÷4
0
1
2 ÷4
÷2
MUX
PLL [1:0]
PL
L0
MCLKO
PLL1PLL2
MUX
MCLKI
x11
PLL
0
1
2
3
MUX
CRYSTAL
XT
AL
OXTALI
OSC
IM3/OM3
IM2/OM2 IM1/OM1 IM0/OM0
0 0 0 0
0 0 0 1
Discrete,rightjustified
0
0
1
0
0 0
1 1
0 1
0
0
0
1
0 1
0
1 1
0
0
1 1 1
1
0
0 0
1
0 0
1
1
0 1
0
1
0
1 1
1
1
0 0
1 1
0
1
1
1 1
0
1 1 1 1
Discrete,leftjustified
Discrete,I2S
TDM_LJ_8
TDM_LJ_6
TDM_LJ_4
TDM_I2S_8
TDM_I2S_6
TDM_I2S_4
Discrete,I2S
Discrete,I2S
Discrete,I2S
Discrete,I2S
Discrete,I2S
Discrete,I2S
Discrete,I2S
Serial AudioPort(AP)ModeCode
Mode
TAS3108,TAS3108IA
AUDIODIGITALSIGNALPROCESSORS
SLES152BOCTOBER2005REVISEDNOVEMBER2007
Figure5-3.SerialDataFormat,ClockManagement,andI
2
CM&NAssignments
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Not Recommended for New Designs