Datasheet

www.ti.com
ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
SN75DP129
SLAS583A JANUARY 2008 REVISED MARCH 2008
Table 1. Control Pin Lookup Table
(1)
SIGNAL LEVEL STATE DESCRIPTION
H Normal Mode Normal operational mode for device
LP
Device is forced into a Low Power state causing the outputs to go to a high impedance
L Low Power Mode
state. All other inputs are ignored.
Internal I
2
C register is active and readable, indicating the connector in use is
H HDMI
HDMI-compliant.
I
2
C_EN
Internal I
2
C register is disabled and unreadable, indicating the connector in use is
L DVI
DVI-compliant.
Compliant Voltage
VS
adj
4.65 k Driver output voltage swing precision control to aid with system compliance.
Swing
(1) (H) Logic High; (L) Logic Low
ORDERING INFORMATION
(1)
PART NUMBER PART MARKING PACKAGE
SN75DP129RHHR DP129 36-pin QFN Reel (large)
SN75DP129RHHT DP129 36-pin QFN Reel (small)
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com .
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE UNIT
Supply voltage range
(2)
VCC 0.3 to 3.6 V
Supply voltage range VDD 0.3 to 3.6 V
Main link I/O (ML_IN x, DP_SINK x) differential voltage 1.5 V
TMDS I/O 0.3 to 4 V
Voltage range HPD I/O 0.3 to 5.5 V
Auxiliary I/O 0.3 to 5.5 V
Control I/O 0.3 to 5.5 V
Human body model
(3)
± 12000 V
Electrostatic discharge Charged-device model
(4)
± 1000 V
Machine model
(5)
± 200 V
Continuous power dissipation See Dissipation Ratings Table
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to network ground terminal.
(3) Tested in accordance with JEDEC Standard 22, Test Method A114-B
(4) Tested in accordance with JEDEC Standard 22, Test Method C101-A
(5) Tested in accordance with JEDEC Standard 22, Test Method A115-A
DERATING FACTOR
(1)
T
A
= 85 ° C
PCB JEDEC
PACKAGE T
A
25 ° C
STANDARD
ABOVE T
A
= 25 ° C POWER RATING
Low-K 1398 mW 13.98 mW/ ° C 559 mW
36-pin QFN (RHH)
High-K 2941 mW 29.41 mW/ ° C 1176 mW
(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): SN75DP129