Datasheet

V
OC
V
OD2
R
L
2
R
L
2
50%
50%
50%
50%
t
PLH
t
PHL
t
PHL
t
PLH
VOLTAGE WAVEFORMS
Input
(see Note B)
1.3 V
1.3 V
C1
C2
C3
R3
R1
R2
Input
1.5 V
S1
See Note A
TEST CIRCUIT
1.3 V
1.3 V
t
sk(p)
t
sk(p)
Y
Z
1.3 V
1.3 V
Y
Z
V
OH
V
OL
3 V
0 V
V
OH
V
OL
C2
VOLTAGE WAVEFORMS
t
r
t
f
0 V
3 V
10%
90%
C1
C3
R3
R1
R2
Input
1.5 V
S1
See Note A
TEST CIRCUIT
10%
90%
Input
(see Note B)
Differential
Output
V
OD
SN65C1167
SN75C1167, SN65C1168, SN75C1168
SLLS159F –MARCH 1993–REVISED NOVEMBER 2009 www.ti.com
PARAMETER MEASUREMENT INFORMATION
Figure 1. Driver Test Circuit, V
OD
and V
OC
A. C1, C2, and C3 include probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, 50% duty cycle, t
r
= t
f
≤ 6 ns.
Figure 2. Driver Test Circuit and Voltage Waveforms
C. C1, C2, and C3 include probe and jig capacitance.
D. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, 50% duty cycle, t
r
= t
f
≤ 6 ns.
Figure 3. Driver Test Circuit and Voltage Waveforms
E. C1, C2, and C3 include probe and jig capacitance.
F. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, 50% duty cycle, t
r
= t
f
≤ 6 ns.
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