Datasheet
SLLS018E − JUNE 1986 − REVISED JUNE 2004
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
3 V
0
V
OH
V
OH
t
PHL
2.2 V
t
PLH
1.5 V
B Output
D Input
C
L
= 30 pF
(see Note B)
Output
5 V
200 Ω
B
3 V
PE
D
50 Ω
3 V
TE
Generator
(see Note A)
TEST CIRCUIT VOLTAGE WAVEFORMS
1 V
480 Ω
1.5 V
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t
r
≤ 6 ns, t
f
≤ 6 n
s,
Z
O
= 50 Ω.
B. C
L
includes probe and jig capacitance.
Figure 1. Terminal-to-Bus Test Circuit and Voltage Waveforms
3 V
0
V
OH
V
OL
t
PHL
t
PLH
1.5 V
D Output
B Input
D
TE
B
Output
4.3 V
50 Ω
Generator
(see Note A)
TEST CIRCUIT VOLTAGE WAVEFORMS
240 Ω
3 kΩ
C
L
= 30 pF
(see Note B)
1.5 V
1.5 V 1.5 V
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t
r
≤ 6 ns, t
f
≤ 6 ns
,
Z
O
= 50 Ω.
B. C
L
includes probe and jig capacitance.
Figure 2. Bus-to-Terminal Test Circuit and Voltage Waveforms