Datasheet

3
1
6
In2
In1
In0
4
Y
SN74LVC1G97-Q1
SCES561D – MARCH 2004 – REVISED APRIL 2008 ........................................................................................................................................................ www.ti.com
FUNCTION TABLE
INPUTS
OUTPUT
Y
In2 In1 In0
L L L L
L L H L
L H L H
L H H H
H L L L
H L H H
H H L L
H H H H
LOGIC DIAGRAM (POSITIVE LOGIC)
FUNCTION TABLE
LOGIC FUNCTION FIGURE NO.
2-to-1 data selector 1
2-input AND gate 2
2-input OR gate with one inverted input 3
2-input NAND gate with one inverted input 3
2-input AND gate with one inverted input 4
2-input NOR gate with one inverted input 4
2-input OR gate 5
Inverter 6
Noninverted buffer 7
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