Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Receiver, transceiver BGA 54 (8x5.5)

FEATURES

DGG, DGV, OR DL PACKAGE

(TOP VIEW)

1DIR

1B1

1B2

GND

1B3

1B4

1B5

1B6

GND

1B7

1B8

2B1

2B2

GND

2B3

2B4

2B5

2B6

GND

2B7

2B8

2DIR

1OE

1A1

1A2

GND

1A3

1A4

1A5

1A6

GND

1A7

1A8

2A1

2A2

GND

2A3

2A4

2A5

2A6

GND

2A7

2A8

2OE

DESCRIPTION/ORDERING INFORMATION

SN74LVC16245A

16-BIT BUS TRANSCEIVER

WITH 3-STATE OUTPUTS

SCES062O – DECEMBER 1995 – REVISED JANUARY 2008

www.ti.com

• Member of the Texas Instruments Widebus™

Family

• Operates From 1.65 V to 3.6 V

• Inputs Accept Voltages to 5.5 V

• Max t

of 4 ns at 3.3 V

• Typical V

OLP

(Output Ground Bounce)

<0.8 V at V

= 3.3 V, T

= 25 ° C

• Typical V

OHV

(Output V

Undershoot)

>2 V at V

= 3.3 V, T

= 25 ° C

• Supports Mixed-Mode Signal Operation on All

Ports (5-V Input/Output Voltage With

3.3-V V

)

• I

off

Supports Partial-Power-Down Mode

Operation

• Latch-Up Performance Exceeds 250 mA Per

JESD 17

• ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

This 16-bit (dual-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V V

operation.

The SN74LVC16245A is designed for asynchronous communication between data buses. The control-function

implementation minimizes external timing requirements.

This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the

A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)

input. The output-enable ( OE) input can be used to disable the device so that the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE should be tied to V

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in

a mixed 3.3-V/5-V system environment.

This device is fully specified for partial-power-down applications using I

off

. The I

off

circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 Widebus is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (18 pages)

PAGE 1
www.ti.com FEATURES SN74LVC16245A 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES062O – DECEMBER 1995 – REVISED JANUARY 2008 1 • Member of the Texas Instruments Widebus™ Family • Operates From 1.65 V to 3.6 V • Inputs Accept Voltages to 5.5 V • Max tpd of 4 ns at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C • Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.
PAGE 2
SN74LVC16245A 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.
PAGE 3
SN74LVC16245A 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCES062O – DECEMBER 1995 – REVISED JANUARY 2008 FUNCTION TABLE (EACH 8-BIT SECTION) INPUTS OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation LOGIC DIAGRAM (POSITIVE LOGIC) 1DIR 1 2DIR 48 1A1 25 1OE 47 2A1 2 24 2OE 36 13 1B1 To Seven Other Channels 2B1 To Seven Other Channels Pin numbers shown are for the DGG, DGV, and DL packages.
PAGE 4
SN74LVC16245A 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCES062O – DECEMBER 1995 – REVISED JANUARY 2008 Recommended Operating Conditions (1) VCC Supply voltage Operating Data retention only VCC = 1.65 V to 1.95 V VIH High-level input voltage MIN MAX 1.65 3.6 1.5 Low-level input voltage VI VCC = 2.3 V to 2.7 V 1.7 VCC = 2.7 V to 3.6 V 2 VO Output voltage IOH High-level output current 0.35 × VCC 0.7 VCC = 2.7 V to 3.6 V 0.8 0 5.
PAGE 5
SN74LVC16245A 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCES062O – DECEMBER 1995 – REVISED JANUARY 2008 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –100 µA VOH 1.65 V to 3.6 V 1.65 V 1.2 IOH = –8 mA 2.3 V 1.7 2.7 V 2.2 3V 2.4 IOH = –24 mA 3V 2.2 IOL = 100 µA 1.65 V to 3.6 V 0.2 IOL = 4 mA 1.65 V 0.45 IOL = 8 mA 2.3 V 0.7 IOL = 12 mA 2.7 V 0.4 3V 0.
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SN74LVC16245A 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCES062O – DECEMBER 1995 – REVISED JANUARY 2008 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VI tr/tf VCC VCC 2.7 V 2.7 V ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V 1.
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
PAGE 9
PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74LVC16245ADGVR SN74LVC16245ADLR Package Package Pins Type Drawing TVSOP SSOP SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DGV 48 2000 330.0 16.4 7.1 10.2 1.6 12.0 16.0 Q1 DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1 SN74LVC16245AZQLR BGA MI CROSTA R JUNI OR ZQL 56 1000 330.0 16.4 4.8 7.3 1.5 8.
PAGE 10
PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC16245ADGVR TVSOP DGV 48 2000 367.0 367.0 38.0 SN74LVC16245ADLR SSOP DL 48 1000 367.0 367.0 55.0 SN74LVC16245AZQLR BGA MICROSTAR JUNIOR ZQL 56 1000 336.6 336.6 28.6 SN74LVC16245AZRDR BGA MICROSTAR JUNIOR ZRD 54 1000 336.6 336.6 28.
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MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 15
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PAGE 17
MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice.
PAGE 18
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.