Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Buffer, driver SOIC 20

SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244

SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244

OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

SDLS144C − APRIL 1985 − REVISED MAY 2010

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D 3-State Outputs Drive Bus Lines or Buffer

Memory Address Registers

D PNP Inputs Reduce DC Loading

D Hysteresis at Inputs Improves Noise

Margins

description

These octal buffers and line drivers are designed

specifically to improve both the performance and

density of three-state memory address drivers,

clock drivers, and bus-oriented receivers and

transmitters. The designer has a choice of

selected combinations of inverting and

noninverting outputs, symmetrical, active-low

output-control (G

) inputs, and complementary

output-control (G and G

) inputs. These devices

feature high fan-out, improved fan-in, and 400-mV

noise margin. The SN74LS’ and SN74S’ devices

can be used to drive terminated lines down to

133 Ω.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

GND

2G/2G

†

1Y1

2A4

1Y2

2A3

1Y3

2A2

1Y4

2A1

SN54LS’, SN54S’ ...J OR W PACKAGE

SN74LS240, SN74LS244 . . . DB, DW, N, OR NS PACKAGE

SN74LS241 ...DW, N, OR NS PACKAGE

SN74S’ . . . DW OR N PACKAGE

(TOP VIEW)

3 2 1 20 19

910111213

1Y1

2A4

1Y2

2A3

1Y3

1A2

2Y3

1A3

2Y2

1A4

SN54LS’, SN54S’ . . . FK PACKAGE

(TOP VIEW)

2Y4

1A1

1Y4

2A2 2G/2G

2Y1

GND

2A1

†

2G for ’LS241 and ’S241 or 2G for all other drivers.

†

2G for ’LS241 and ’S241 or 2G for all other drivers.

†

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Summary of content (31 pages)

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SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 Memory Address Registers D PNP Inputs Reduce DC Loading D Hysteresis at Inputs Improves Noise SN54LS’, SN54S’ . . . J OR W PACKAGE SN74LS240, SN74LS244 . . . DB, DW, N, OR NS PACKAGE SN74LS241 . . . DW, N, OR NS PACKAGE SN74S’ . . .
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SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 ORDERING INFORMATION{ PACKAGE} TA PDIP − N 0°C to 70°C SOIC − DW SOP − NS SSOP − DB Tube ORDERABLE PART NUMBER SN74LS240N SN74LS240N SN74LS241N SN74LS241N SN74LS244N SN74LS244N SN74S240N SN74S240N SN74S241N SN74S241N SN74S244N SN74S244N Tube SN74LS240DW Tape and reel SN74
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SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 ORDERING INFORMATION{ (CONTINUED) PACKAGE} TA CDIP − J Tube −55°C 55°C to 125°C CFP − W LCCC − FK Tube Tube ORDERABLE PART NUMBER TOP-SIDE MARKING SN54LS240J SN54LS240J SNJ54LS240J SNJ54LS240J SN54LS241J SN54LS241J SNJ54LS241J SNJ54LS241J SN54LS244J SN54LS244J SNJ54LS244J
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SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 schematics of inputs and outputs ’LS240, ’LS241, ’LS244 ’S240, ’S241, ’S244 EQUIVALENT OF EACH INPUT EQUIVALENT OF EACH INPUT VCC VCC Req 9 kΩ NOM Input Input G and G inputs: Req = 2 kΩ NOM A inputs: Req = 2.8 kΩ NOM TYPICAL OF ALL OUTPUTS VCC R Output GND ’LS240.
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SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 logic diagram ’LS240, ’S240 1G 1A1 1A2 1A3 1A4 2G 2A1 2A2 2A3 2A4 ’LS241, ’S241 1 1G 2 18 1Y1 1A1 4 16 1Y2 1A2 6 14 1Y3 1A3 8 12 1Y4 1A4 19 2G 11 9 13 7 15 5 17 3 2Y1 2A1 2Y2 2A2 2Y3 2A3 2Y4 2A4 1 2 18 4 16 6 14 8 12 1Y1 1Y2 1Y3 1Y4 19 11
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SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: ’LS . . . . . . . . . .
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SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LS’ TEST CONDITIONS† PARAMETER VIK VCC = MIN, Hysteresis (VT+ − VT−) VCC = MIN MIN TYP‡ II = −18 mA SN74LS’ MAX MIN TYP‡ −1.5 MAX −1.5 0.2 0.4 0.2 0.4 3.4 2.4 3.
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SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 recommended operating conditions SN54S’ SN74S’ MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.75 5 5.25 UNIT VCC Supply voltage (see Note 1) VIH High-level input voltage VIL Low-level input voltage 0.8 0.
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SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 switching characteristics, VCC = 5 V, TA = 25°C (see Figure 2) ’S240 PARAMETER tPLH tPHL tPZL tPZH tPLZ tPHZ TEST CONDITIONS MIN RL = 90 Ω Ω, CL = 50 pF F RL = 90 Ω Ω, CL = 50 pF F RL = 90 Ω Ω, CL = 5 pF POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ’S241, ’S244 TYP MAX 4.5 4.
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SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 PARAMETER MEASUREMENT INFORMATION SERIES 54LS/74LS DEVICES VCC Test Point Test Point VCC RL From Output Under Test CL (see Note A) CL (see Note A) High-Level Pulse 1.3 V S2 LOAD CIRCUIT FOR 3-STATE OUTPUTS 3V Timing Input 1.
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SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 PARAMETER MEASUREMENT INFORMATION SERIES 54S/74S DEVICES VCC Test Point Test Point VCC RL (see Note B) From Output Under Test CL (see Note A) High-Level Pulse 1.5 V S2 LOAD CIRCUIT FOR 3-STATE OUTPUTS 3V Timing Input 1.
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SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C − APRIL 1985 − REVISED MAY 2010 APPLICATION INFORMATION 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74LS240DWR Package Package Pins Type Drawing SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) DW 20 2000 330.0 24.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 10.8 13.0 2.7 12.0 24.0 Q1 SN74LS240NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74LS241DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LS240DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74LS240NSR SO NS 20 2000 367.0 367.0 45.0 SN74LS241DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74LS241NSR SO NS 20 2000 367.0 367.0 45.0 SN74LS244DBR SSOP DB 20 2000 367.0 367.0 38.0 SN74LS244DWR SOIC DW 20 2000 367.0 367.0 45.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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