Datasheet

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    
   
SCLS573 − MARCH 2004
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Figure 13. Propagation Delays, Enable to Analog
Out
ENABLE
ANALOG
OUT
ANALOG
OUT
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
GND
10%
90%
V
CC
HIGH
IMPEDANCE
50 %
50 %
t
f
t
f
90%
50%
10%
HIGH
IMPEDANCE
Figure 14. Propagation Delay, Enable to Analog
Out, Test Setup
6
8
ON/OFF
V
CC
V
CC
16
ENABLE
1
2
1
2
C
L
TEST POIN
T
10 kΩ
Position 1 when testing t
PHZ
and t
PZH
Position 2 when testing t
PLZ
and t
PZL
ANALOG
I/O
Figure 15. Power-Dissipation Capacitance, Test
Setup
COMMON O/I
6
8
ON/OFF
OFF/ON
V
CC
V
CC
16
ANALOG I/O
NC
CHANNEL SELECT
A
11
V
CC