SN74F161A
SYNCHRONOUS 4-BIT BINARY COUNTER
SDFS056B – MARCH 1987 – REVISED AUGUST 2001
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
R
G2
1, 3D
M1
1
, 2T/C3
R
G2
1, 3D
M1
1
, 2T/C3
R
G2
1, 3D
M1
1
, 2T/C3
R
G2
1, 3D
M1
1
, 2T/C3
1
9
10
7
2
3
4
5
6
15
14
13
12
11
CLR
LOAD
ENT
ENP
CLK
A
B
C
D
RCO
Q
A
Q
B
Q
C
Q
D
