Datasheet




SDAS111B − APRIL 1982 − REVISED DECEMBER 1994
Copyright  1994, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
• Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
These devices contain four independent 2-input
positive-NOR gates. They perform the Boolean
functions Y = A + B
or Y = A • B in positive logic.
The SN54ALS02A and SN54AS02 are
characterized for operation over the full military
temperature range of −55°C to 125°C. The
SN74ALS02A and SN74AS02 are characterized
for operation from 0°C to 70°C.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
A B
OUTPUT
Y
H X L
X HL
L L H
logic symbol
†
logic diagram (positive logic)
2
1A
3
1B
5
2A
6
2B
8
3A
9
3B
11
4A
12
4B
1Y
1
2Y
4
3Y
10
4Y
13
≥1
2
1A
3
1B
5
2A
6
2B
8
3A
9
3B
11
4A
12
4B
1Y
1
2Y
4
3Y
10
4Y
13
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
SN54ALS02A, SN54AS02 ...J PACKAGE
SN74ALS02A, SN74AS02 ...D OR N PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1Y
1A
1B
2Y
2A
2B
GND
V
CC
4Y
4B
4A
3Y
3B
3A
SN54ALS02A, SN54AS02 . . . FK PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
4B
NC
4A
NC
3Y
1B
NC
2Y
NC
2A
1A 1Y NC
3A 3B
V 4Y
2B
NC
CC
NC − No internal connection
GND
  !" # $%&" !#  '%()$!" *!"&+
*%$"# $ " #'&$$!"# '& ",& "&#  &-!# #"%&"#
#"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*&
"&#"0  !)) '!!&"&#+