Datasheet

 
   
   
SCAS521F − AUGUST 1995 − REVISED OCTOBER 2003
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
INPUTS OUTPUTS
PRE
CLR
CLK D Q Q
L H X X H L
H LXXLH
L LXXH
†
H
†
H H ↑ HHL
H H ↑ LLH
H H L X Q
0
Q
0
†
This configuration is unstable; that is, it does not
persist when either PRE
or CLR returns to its
inactive (high) level.
logic diagram, each flip-flop (positive logic)
TG
C
C
TG
C
C
TG
C
C
C
C
TG
C
C
PRE
CLK
D
CLR
Q
Q