Datasheet

SN65MLVD047A
SLLS736A − JULY 2006 − REVISED MAY 2008
www.ti.com
7
Output
Y
Output
t
pLH
t
pHL
Input
C3
0.5 pF
Z
D
0 V
0.9V
V
0 V
t
f
t
r
V
CC
V
CC
/2
0 V
SS
SS
0 V
0.1V
SS
SS
C1
1 pF
C2
1 pF
V
P(H)
V
P(L)
R1
50 Ω
NOTES:A. All input pulses are supplied by a generator having the following characteristics: t
r
or t
f
≤ 1 ns, frequency = 500 kHz,
duty cycle = 50 ±5%.
B. C1, C2, and C3 include instrumentation and fixture capacitance within 2 cm of the D.U.T. and are ±20%.
C. R1 is a metal film, surface mount, and 1% tolerance and located within 2 cm of the D.U.T.
D. The measurement is made on test equipment with a −3 dB bandwidth of at least 1 GHz.
Figure 5. Driver Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal
Y
Z
R1
24.9 Ω
t
pZH
t
pHZ
t
pZL
t
pLZ
V
CC
V
CC
/2
0 V
∼ 0.6 V
0.1 V
0 V
∼ −0.6 V
0 V
−0.1 V
EN
Output With
D at V
CC
Output
0 V or V
CC
EN or EN
Output With
D at 0 V
C1
1 pF
R2
24.9 Ω
C4
0.5 pF
C2
1 pF
D
C3
2.5 pF
Input
EN
NOTES:A. All input pulses are supplied by a generator having the following characteristics: t
r
or t
f
≤ 1 ns, frequency = 500 kHz, duty cycle = 50 ±
5%.
B. C1, C2, C3, and C4 includes instrumentation and fixture capacitance within 2 cm of the D.U.T. and are ±20%.
C. R1 and R2 are metal film, surface mount, and 1% tolerance and located within 2 cm of the D.U.T.
D. The measurement is made on test equipment with a −3 dB bandwidth of at least 1 GHz.
Figure 6. Driver Enable and Disable Time Circuit and Definitions