Datasheet

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FEATURES APPLICATIONS

DESCRIPTION

SN65LVDT14-EP, SN65LVDT41-EP

SCES633 – JUNE 2005

Memory Stick™ INTERCONNECT EXTENDER CHIPSET WITH LVDS

SN65LVDT14 – ONE DRIVER PLUS FOUR RECEIVERS

SN65LVDT41 – FOUR DRIVERS PLUS ONE RECEIVER

• Memory Stick™ Interface Extensions With

• Controlled Baseline

Long Interconnects Between Host and

– One Assembly/Test Site, One Fabrication

Memory Stick

Site

• Serial Peripheral Interface™ ( SPI™) Interface

• Enhanced Diminishing Manufacturing

Extension to Allow Long Interconnects

Sources (DMS) Support

Between Master and Slave

• Enhanced Product-Change Notification

• MultiMediaCard™ (MMC) Interface in SPI

Mode

• Qualification Pedigree

(1)

• General-Purpose Asymmetric Bidirectional

• Integrated 110- Ω Nominal Receiver Line

Communication

Termination Resistor

• Operate From a Single 3.3-V Supply

• Greater Than 125-Mbps Data Rate

The SN65LVDT14 combines one LVDS line driver

• Flow-Through Pinout

with four terminated LVDS line receivers in one

• LVTTL-Compatible Logic I/Os

package. It is designed to be used at the Memory

Stick™ end of an LVDS-based Memory Stick

• ESD Protection on Bus Pins Exceeds 12 kV

interface extension.

• Meet or Exceed Requirements of

ANSI/TIA/EIA-644A Standard for LVDS

The SN65LVDT41 combines four LVDS line drivers

with a single terminated LVDS line receiver in one

• 20-Pin Thin Shrink Small-Outline

package. It is designed to be used at the host end of

Package (PW) With 26-Mil Terminal Pitch

an LVDS-based Memory Stick interface extension.

(1) Component qualification in accordance with JEDEC and

brk

industry standards to ensure reliable operation over an

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extended temperature range. This includes, but is not limited

to, Highly Accelerated Stress Test (HAST) or biased 85/85,

temperature cycle, autoclave or unbiased HAST,

electromigration, bond intermetallic life, and mold compound

life. Such qualification testing should not be viewed as

justifying use of this component beyond specified

performance and environmental limits.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Serial Peripheral Interface, SPI are trademarks of Motorola.

MultiMediaCard is a trademark of MultiMediaCard Association.

Memory Stick is a trademark of Sony.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

On products compliant to MIL-PRF-38535, all parameters are

Instruments standard warranty. Production processing does not

tested unless otherwise noted. On all other products, production

necessarily include testing of all parameters.

processing does not necessarily include testing of all parameters.

Summary of content (19 pages)

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SN65LVDT14-EP, SN65LVDT41-EP www.ti.
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SN65LVDT14-EP, SN65LVDT41-EP www.ti.
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SN65LVDT14-EP, SN65LVDT41-EP www.ti.com SCES633 – JUNE 2005 Package Dissipation Ratings PACKAGE TA < 25°C POWER RATING OPERATING FACTOR ABOVE TA = 25°C TA = 85°C POWER RATING TA = 125°C POWER RATING PW 774 mW 6.2 mW/°C 402 mW 154 mW Recommended Operating Conditions MIN NOM MAX VCC Supply voltage range 3 3.3 3.6 VIH High-level input voltage 2 VIL Low-level input voltage |VID| Magnitude of differential input voltage VIC Common-mode input voltage (see Figure 1) UNIT V V 0.8 V 0.
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SN65LVDT14-EP, SN65LVDT41-EP www.ti.com SCES633 – JUNE 2005 Receiver Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX Positive-going differential input voltage threshold See Figure 2 and Table 1 VITH– Negative-going differential input voltage threshold See Figure 2 and Table 1 VOH High-level output voltage IOH = –8 mA VOL Low-level output voltage IOL = 8 mA 0.
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SN65LVDT14-EP, SN65LVDT41-EP www.ti.com SCES633 – JUNE 2005 Receiver Switching Characteristics over operating free-air temperature range (unless otherwise noted) MIN NOM MAX tPLH Propagation delay time, low- to high-level output PARAMETER 1 2.6 4.8 ns tPHL Propagation delay time, high- to low-level output 1 2.6 4.8 ns tr Output signal rise time 0.15 1.4 ns tf Output signal fall time 0.15 1.
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SN65LVDT14-EP, SN65LVDT41-EP www.ti.com SCES633 – JUNE 2005 PARAMETER MEASUREMENT INFORMATION A V IA V IB R VID 2 VIA B VIC VO VIB Figure 2. Receiver Voltage Definitions Table 1. Receiver Minimum and Maximum Input Threshold Test Voltages APPLIED VOLTAGE RESULTING DIFFERENTIAL INPUT VOLTAGE RESULTING COMMON-MODE INPUT VOLTAGE VID VIC 1.2 V VIA VIB 1.25 V 1.15 V 100 mV 1.15 V 1.25 V –100 mV 1.2 V 2.4 V 2.3 V 100 mV 2.35 V 2.3 V 2.4 V –100 mV 2.35 V 0.1 V 0V 100 mV 0.
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SN65LVDT14-EP, SN65LVDT41-EP www.ti.com SCES633 – JUNE 2005 PARAMETER MEASUREMENT INFORMATION VID VIA VIB CL 10 pF VO VIA 1.4 V VIB 1V VID 0.4 V 0V −0.4 V tPHL VO tPLH VOH 80% VCC/2 20% VOL tf A. tr All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate (PRR) = 1 Mpps, pulse width = 0.5 ± 0.05 µs. CL includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T. Figure 4.
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SN65LVDT14-EP, SN65LVDT41-EP www.ti.com SCES633 – JUNE 2005 PARAMETER MEASUREMENT INFORMATION 3.75 kΩ Y + _ 100 Ω VOD Input Z 0 V ≤ Vtest ≤ 2.4 V 3.75 kΩ Figure 5. Driver VDO Test Circuit 49.9 Ω, ±1% (2 Places) 3V Y D Input VIA Z 2 pF 0V VOC VOC(PP) VOC(SS) VOC A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate (PRR) = 0.5 Mpps, pulse width = 500 ± 10 µs.
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SN65LVDT14-EP, SN65LVDT41-EP www.ti.
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SN65LVDT14-EP, SN65LVDT41-EP www.ti.
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SN65LVDT14-EP, SN65LVDT41-EP www.ti.com SCES633 – JUNE 2005 TYPICAL CHARACTERISTICS Receiver HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 4 5 TA = 25°C, VCC = 3.3 V 3 2.5 2 1.5 1 0.5 4 3.5 3 2.5 2 1.5 1 0.5 0 −70 −60 0 −50 −40 −30 −20 −10 0 20 30 40 50 60 Figure 8. Figure 9. VCC = 3 V 2.8 VCC = 3.3 V 2.7 2.6 VCC = 3.6 V 2.4 2.3 −25 0 25 50 75 TA − Free-Air Temperature − °C Figure 10.
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SN65LVDT14-EP, SN65LVDT41-EP www.ti.com SCES633 – JUNE 2005 TYPICAL CHARACTERISTICS Driver HIGH-TO-LOW PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE 2.1 2 VCC = 3 V 1.9 1.8 VCC = 3.6 V 1.7 1.6 VCC = 3.3 V 1.5 −50 −25 0 25 50 75 TA − Free-Air Temperature − °C Figure 12. 12 t PHL − High-To-Low Propagation Delay Time − ns t PLH − Low-To-High Propagation Delay Time − ns LOW-TO-HIGH PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE 100 2.2 2.1 VCC = 3 V 2 VCC = 3.3 V 1.9 1.8 1.7 VCC = 3.6 V 1.6 1.
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SN65LVDT14-EP, SN65LVDT41-EP www.ti.com SCES633 – JUNE 2005 APPLICATION INFORMATION bbbbrk Extending the Memory Stick Interface Using LVDS Signaling Over Differential Transmission Cables SN65LVDT41 1D SCLK Memory BS Stick Host SDIO Controller DIR 2D 3D 4D SN65LVDT14 1Y SCLK 1Z 2Y BS 2Z 3Y DIR 3Z 4Y 5A 5R 5B 1R 2A 2B 3A SCLK Memory BS Stick 2R SDIO 3R 3B SD1 4A 4R 4B 4Z CBT 1A 1B SD2 CBT 5Y 5D 5Z Figure 14.
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SN65LVDT14-EP, SN65LVDT41-EP www.ti.com SCES633 – JUNE 2005 MECHANICAL DATA PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°− 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX 0,10 PINS ** 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 14 A. All linear dimensions are in millimeters. B.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN65LVDT14QPWREP TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 SN65LVDT41QPWREP TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65LVDT14QPWREP TSSOP PW 20 2000 367.0 367.0 38.0 SN65LVDT41QPWREP TSSOP PW 20 2000 367.0 367.0 38.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.