Datasheet

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FEATURES

DESCRIPTION

GND

SN55LVDS31 . . . J OR W

SN65LVDS31 . . . D OR PW

(Marked as LVDS31 or 65LVDS31)

(TOP VIEW)

1,2EN

GND

3,4EN

SN65LVDS3487D

(Marked as LVDS3487 or 65LVDS3487)

(TOP VIEW)

GND

SN65LVDS9638D (Marked as DK638 or LVDS38)

SN65LVDS9638DGN (Marked as L38)

SN65LVDS9638DGK (Marked as AXG)

(TOP VIEW)

192013 2

1312119 10

GND

SN55LVDS31FK

(TOP VIEW)

SN55LVDS31, SN65LVDS31

SN65LVDS3487, SN65LVDS9638

SLLS261L – JULY 1997 – REVISED JULY 2007

HIGH-SPEED DIFFERENTIAL LINE DRIVERS

• Meet or Exceed the Requirements of ANSI

TIA/EIA-644 Standard

• Low-Voltage Differential Signaling With

Typical Output Voltage of 350 mV and 100- Ω

Load

• Typical Output Voltage Rise and Fall Times of

500 ps (400 Mbps)

• Typical Propagation Delay Times of 1.7 ns

• Operate From a Single 3.3-V Supply

• Power Dissipation 25 mW Typical Per Driver

at 200 MHz

• Driver at High Impedance When Disabled or

With V

= 0

• Bus-Terminal ESD Protection Exceeds 8 kV

• Low-Voltage TTL (LVTTL) Logic Input Levels

• Pin Compatible With AM26LS31, MC3487, and

μ A9638

• Cold Sparing for Space and High Reliability

Applications Requiring Redundancy

The SN55LVDS31, SN65LVDS31, SN65LVDS3487,

and SN65LVDS9638 are differential line drivers that

implement the electrical characteristics of low-voltage

differential signaling (LVDS). This signaling

technique lowers the output voltage levels of 5-V

differential standard levels (such as TIA/EIA-422B) to

reduce the power, increase the switching speeds,

and allow operation with a 3.3-V supply rail. Any of

the four current-mode drivers will deliver a minimum

differential output voltage magnitude of 247 mV into

a 100- Ω load when enabled.

The intended application of these devices and

signaling technique is both point-to-point and

multidrop (one driver and multiple receivers) data

transmission over controlled impedance media of

approximately 100 Ω . The transmission media may

be printed-circuit board traces, backplanes, or

cables. The ultimate rate and distance of data

transfer is dependent upon the attenuation

characteristics of the media and the noise coupling

to the environment.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (33 pages)

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SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 www.ti.com SLLS261L – JULY 1997 – REVISED JULY 2007 HIGH-SPEED DIFFERENTIAL LINE DRIVERS DESCRIPTION The SN55LVDS31, SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 are differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS).
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SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 www.ti.com SLLS261L – JULY 1997 – REVISED JULY 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DESCRIPTION (CONTINUED) The SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 are characterized for operation from –40°C to 85°C. The SN55LVDS31 is characterized for operation from –55°C to 125°C.
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SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 www.ti.com SLLS261L – JULY 1997 – REVISED JULY 2007 SN65LVDS3487 logic diagram (positive logic) logic symbol† SN65LVDS3487 1,2EN 1A 2A 3,4EN 3A 4A † 4 EN 2 1 3 6 7 12 5 1Y 2Y 11 14 15 5 2Z 13 3,4EN 3Y 3Z 4A 9 10 11 1Z 2Y 2Z 3Y 3Z 12 15 14 13 4Y 4Y 4Z 4Z This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
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SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 www.ti.
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SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 www.ti.com SLLS261L – JULY 1997 – REVISED JULY 2007 EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS EQUIVALENT OF EACH A INPUT EQUIVALENT OF G, G, 1,2EN OR 3,4EN INPUTS VCC VCC TYPICAL OF ALL OUTPUTS VCC 50 Ω 50 Ω Input Input 10 kΩ 5Ω Y or Z Output 7V 7V 300 kΩ 7V ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) UNIT VCC Supply voltage range (2) VI Input voltage range –0.5 V to 4 V –0.
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SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 www.ti.com SLLS261L – JULY 1997 – REVISED JULY 2007 RECOMMENDED OPERATING CONDITIONS MIN NOM VCC Supply voltage 3 VIH High-level input voltage 2 VIL Low-level input voltage TA Operating free-air temperature 3.3 MAX 3.6 UNIT V V 0.
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SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 www.ti.
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SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 www.ti.com SLLS261L – JULY 1997 – REVISED JULY 2007 PARAMETER MEASUREMENT INFORMATION IOY Y II A Z IOZ VOD VOY VOC VI (VOY + VOZ)/2 VOZ Figure 1. Voltage and Current Definitions 2V 1.4 V 0.8 V Input tPLH Y Input (see Note A) VOD Z tPHL 100 Ω ± 1% 100% 80% VOD CL = 10 pF (2 Places) (see Note B) 0 20% 0% tf tr NOTES: A.
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SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 www.ti.com SLLS261L – JULY 1997 – REVISED JULY 2007 PARAMETER MEASUREMENT INFORMATION (continued) 49.9 Ω ± 1% (2 Places) Y Inputs (see Note A) 0.8 V or 2 V Z 1.2 V G G 1,2EN or 3,4EN CL = 10 pF (2 Places) (see Note B) G, 1,2EN, OR 3,4EN 2V 1.4 V 0.8 V G 2V 1.4 V 0.8 V tPZH VOZ or VOY VOZ tPHZ VOY or VOZ tPZL VOY 100%, ≅1.4 V 50% 0%, 1.2 V A at 2 V, G at VCC and Input to G or G at GND and Input to G for ’LVDS31 Only 100%, 1.
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SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 www.ti.com SLLS261L – JULY 1997 – REVISED JULY 2007 TYPICAL CHARACTERISTICS SN55LVDS31, SN65LVDS31 SUPPLY CURRENT vs FREQUENCY LOW-TO-HIGH PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE 35 I CC − Supply Current − mA 33 t PLH − Low-to-High Propagation Delay Time − ns 1.9 Four Drivers Loaded Per Figure 3 and Switching Simultaneously VCC = 3.6 V 31 29 VCC = 3 V 27 25 VCC = 3.3 V 23 21 19 17 15 50 100 150 200 1.8 1.7 1.6 VCC = 3.3 V 1.
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SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 www.ti.com SLLS261L – JULY 1997 – REVISED JULY 2007 APPLICATION INFORMATION The devices are generally used as building blocks for high-speed point-to-point data transmission where ground differences are less than 1 V. Devices can interoperate with RS-422, PECL, and IEEE-P1596. Drivers/receivers approach ECL speeds without the power and dual supply requirements.
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SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 www.ti.com SLLS261L – JULY 1997 – REVISED JULY 2007 APPLICATION INFORMATION (continued) 1/4 ’LVDS31 Strb/Data_TX Tp Bias on Twisted-Pair A Strb/Data_Enable TP 55 Ω ’LVDS32 5 kΩ Data/Strobe 55 Ω 3.3 V TP 20 kΩ 500 Ω VG on Twisted-Pair B 1 Arb_RX 500 Ω 20 kΩ 3.3 V 500 Ω 20 kΩ 2 Arb_RX 500 Ω 20 kΩ 3.3 V 7 kΩ Twisted-Pair B Only 7 kΩ 10 kΩ Port_Status 3.3 kΩ NOTES: A. B. C. D. Resistors are leadless, thick film (0603), 5% tolerance.
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SN55LVDS31, SN65LVDS31 SN65LVDS3487, SN65LVDS9638 www.ti.com SLLS261L – JULY 1997 – REVISED JULY 2007 APPLICATION INFORMATION (continued) 0.01 µF 1 1A VCC ≈3.6 V 16 5V 0.1 µF (see Note A) 2 ZO = 100 Ω 3 VCC 4 5 1Y 4A 1Z 4Y G 4Z 2Z G 1N645 (2 places) 15 14 ZO = 100 Ω 13 12 See Note B ZO = 100 Ω 6 7 8 2Y 3Z 2A 3Y GND 3A 11 10 ZO = 100 Ω 9 A. Place a 0.1-μF Z5U ceramic, mica, or polystyrene dielectric, 0805 size, chip capacitor between VCC and the ground plane.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN65LVDS31DR Package Package Pins Type Drawing SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SN65LVDS31NSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 SN65LVDS31PWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65LVDS31DR SOIC D 16 2500 333.2 345.9 28.6 SN65LVDS31NSR SO NS 16 2000 367.0 367.0 38.0 SN65LVDS31PWR TSSOP PW 16 2000 367.0 367.0 35.0 SN65LVDS3487DR SOIC D 16 2500 367.0 367.0 38.0 SN65LVDS9638DGKR VSSOP DGK 8 2500 358.0 335.0 35.0 SN65LVDS9638DGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.