Datasheet

V
IA
V
IB
V
O
–100 mV @ 250 KHz
–32 mV @ 250 KHz
Failsafe Asserted
V
IA
V
IB
V
O
a) No Failsafe
b) Failsafe Asserted
t
d1
t
d2
1.4 V
1 V
0.4 V
0 V
–0.4 V
V
OH
1.4 V
V
OL
–0.2 V
>1.5 µs
SN65LVDS33, SN65LVDT33
SN65LVDS34, SN65LVDT34
SLLS490B –MARCH 2001–REVISED NOVEMBER 2004 www.ti.com
Table 2. Receiver Minimum and Maximum V
IT3
Input Threshold Test Voltages
APPLIED VOLTAGES
(1)
RESULTANT INPUTS
V
IA
(mV) V
IB
(mV) V
ID
(mV) V
IC
(mV) Output
–4000 –3900 –100 –3950 L
–4000 –3968 –32 –3984 H
4900 5000 –100 4950 L
4968 5000 –32 4984 H
(1) These voltages are applied for a minimum of 1.5 µs.
Figure 5. V
IT3
Failsafe Threshold Test
Figure 6. Waveforms for Failsafe Activate and Deactivate
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