Datasheet
SLLS376D− MAY 2000 − REVISED JULY 2008
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
PARAMETER MEASUREMENT INFORMATION
V
OC
V
OD
27
Ω
27
Ω
0 or 3 V
Figure 1. Driver V
OD
and V
OC
Figure 2. Driver V
OD3
V
OD
V
test
R1
375 Ω
0 V or 3 V
Z
D
R2
375 Ω
V
test
Y
R
L
= 60 Ω
−7 V < V
test
< 12 V
VOLTAGE WAVEFORMS
10%
t
f
t
PHL
t
r
≈ 1.5 V
≈ − 1.5 V
90%
50%
Output
t
PLH
0 V
3 V
1.5 V
Input
TEST CIRCUIT
V
O
C
L
= 50 pF
(see Note B)
R
L
= 54 Ω
50 Ω
Generator
(see Note A)
1.5 V
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t
r
≤ 6 ns, t
f
≤ 6 ns,
Z
O
=50Ω.
B. C
L
includes probe and jig capacitance.
Figure 3. Driver Test Circuit and Voltage Waveforms
VOLTAGE WAVEFORMS
t
PHZ
1.5 V
2.3 V
0.5 V
0 V
3 V
t
PZH
Output
Input
1.5 V
S1
3 V
Output
TEST CIRCUIT
50 Ω
V
OH
V
off
≈ 0 V
R
L
= 110 Ω
Generator
(see Note A)
C
L
= 50 pF
(see Note B)
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t
r
≤ 6 ns, t
f
≤ 6 ns,
Z
O
=50Ω.
B. C
L
includes probe and jig capacitance.
Figure 4. Driver Test Circuit and Voltage Waveforms