Datasheet

V
I
V
O
t
PZH(1&2)
50 W
D
DS1
3V Y
0VZ
Y
Z
V
I
R
L
=110 W
±1%
C
L
=50 pF
±20%
V
O
Generator:PRR=500kHz,50%DutyCycle,t
r
<6ns,t
f
<6ns,Z
0
=50 W
C
L
IncludesFixtureandInstrumentationCapacitance
3V
1.5V
1.5V
t
PHZ
2.3V
DE
Input
Generator
~0V
V
OH
0.5V
0V
S1
Input
Generator
50
V
O
S1
V
CC
3V
V
CC
1.5V 1.5V
t
PZL(1&2)
t
PLZ
2.3V
0.5V
0V
V
OL
V
I
V
O
Generator:PRR=500kHz,50%DutyCycle,t
r
<6ns,t
f
<6ns,Z
o
=50
R
L
=110
± 1%
C
L
=50pF ±20%
C
L
IncludesFixture
andInstrumentation
Capacitance
D
Y
Z
DE
V
I
DS1
3VZ
0V Y
B
A
R
I
O
V
ID
I
A
I
B
V
O
V
B
V
IC
V
A
V
A
+V
B
2
I
I
RE
V
I
SN65HVD50-SN65HVD55
SLLS666E SEPTEMBER 2005REVISED OCTOBER 2009
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 6. Driver High-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms
Figure 7. Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms
Figure 8. Receiver Voltage and Current Definitions
10 Submit Documentation Feedback Copyright © 2005–2009, Texas Instruments Incorporated
Product Folder Link(s) :SN65HVD50-SN65HVD55