Datasheet

SN65HVD50-SN65HVD55
www.ti.com
SLLS666E SEPTEMBER 2005REVISED OCTOBER 2009
RECEIVER SWITCHING CHARACTERISTICS
over recommended operating conditions unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
HVD50, HVD53 24 40
Propagation delay time,
t
PLH
HVD51, HVD52, HVD54,
low-to-high-level output
43 55
HVD55
HVD50, HVD53 26 35
Propagation delay time,
t
PHL
HVD51, HVD52, HVD54,
high-to-low-level output
47 60
HVD55
V
ID
= -1.5 V to 1.5 V,
HVD50, HVD53 5
C
L
= 15 pF,
t
sk(p)
Pulse skew (|t
PHL
- t
PLH
|)
HVD51, HVD54 See Figure 9 7
HVD50, HVD53 5
t
sk(pp)
(2)
Part-to-part skew HVD51, HVD54 6
HVD52, HVD55 6 ns
t
r
Output signal rise time 2.3 4
t
f
Output signal fall time 2.4 4
t
PHZ
Output disable time from high level 17
DE at 3 V, C
L
= 15 pF
See Figure 10
t
PZH1
Output enable time to high level 10
DE at 0 V, C
L
= 15 pF
t
PZH2
Propagation delay time, standby-to-high-level output 3300
See Figure 10
t
PLZ
Output disable time from low level 13
DE at 3 V, C
L
= 15 pF
See Figure 11
t
PZL1
Output enable time to low level 10
DE at 0 V, C
L
= 15 pF
t
PZL2
Propagation delay time, standby-to-low-level output 3300
See Figure 11
(1) All typical values are at 25°C and with a 5-V supply
(2) .t
sk(pp)
is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices
operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
Copyright © 2005–2009, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s) :SN65HVD50-SN65HVD55