Datasheet

Vcc2
Vcc1
GND
1
GND
2
±7V
OFFSET
ALWAYS
ENABLED
ALWAYS
HIGH
Node 1 D-pin
Node 2 DE -pin
BusVdiff
D
DE
CONTENTION
SN65HVD30 – SN65HVD35
www.ti.com SLLS665I –SEPTEMBER 2005–REVISED APRIL 2010
Figure 14. Bus Contention Example
Figure 15 shows typical operation in a bus contention event. The bottom trace illustrates how the SN65HVD33 at
Node 1 continues normal operation after a contention event between the two drivers, with a –7 V ground offset
on Node 2. This illustrates how the HVD3x family of devices operates robustly in spite of bus contention faults,
even with large common-mode offsets.
Figure 15. HVD3x Drivers Operate Correctly After Bus Contention Faults
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