Datasheet
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
www.ti.com
SLLS872H –JANUARY 2008–REVISED FEBRUARY 2010
SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DRIVER (HVD1785 AND HVD1791)
t
r
, t
f
Driver differential output rise/fall time 0.4 1.7 2.6 ms
t
PHL
, t
PLH
Driver propagation delay 0.8 2 ms
R
L
= 54 Ω, C
L
= 50 pF, See Figure 3
Driver differential output pulse skew,
t
SK(P)
20 250 ns
|t
PHL
– t
PLH
|
t
PHZ
, t
PLZ
Driver disable time 0.1 5 ms
See Figure 4 and
Receiver enabled 0.2 3
Figure 5
t
PZH
, t
PZL
Driver enable time ms
Receiver disabled 3 12
DRIVER (HVD1786 AND HVD1792)
t
r
, t
f
Driver differential output rise/fall time 50 300 ns
t
PHL
, t
PLH
Driver propagation delay 200 ns
R
L
= 54 Ω, C
L
= 50 pF, See Figure 3
Driver differential output pulse skew,
t
SK(P)
25 ns
|t
PHL
– t
PLH
|
t
PHZ
, t
PLZ
Driver disable time 3 ms
See Figure 4 and
Receiver enabled 300 ns
Figure 5
t
PZH
, t
PZL
Driver enable time Receiver disabled 10 ms
Receiver enabled V
CM
> V
CC
500 ns
DRIVER (HVD1787 AND HVD1793)
t
r
, t
f
Driver differential output rise/fall time 3 30 ns
t
PHL
, t
PLH
Driver propagation delay 50 ns
R
L
= 54 Ω, C
L
= 50 pF, See Figure 3
Driver differential output pulse skew,
t
SK(P)
10 ns
|t
PHL
– t
PLH
|
t
PHZ
, t
PLZ
Driver disable time 3 ms
See Figure 4 and
Receiver enabled 300 ns
Figure 5
t
PZH
, t
PZL
Driver enable time Receiver disabled 9 ms
Receiver enabled V
CM
> V
CC
500 ns
RECEIVER (ALL DEVICES UNLESS OTHERWISE NOTED)
t
r
, t
f
Receiver output rise/fall time 4 15 ns
85, 86, 91, 92 100 200
t
PHL
, t
PLH
Receiver propagation delay time ns
C
L
= 15 pF,
87, 93 70
See Figure 6
85, 86, 91, 92 6 20
Receiver output pulse skew,
t
SK(P)
ns
|t
PHL
– t
PLH
|
87, 93 5
t
PLZ
, t
PHZ
Receiver disable time Driver enabled, See Figure 7 15 100 ns
t
PZL(1)
, t
PZH(1)
Driver enabled, See Figure 7 80 300 ns
Receiver enable time
t
PZL(2
), t
PZH(2)
Driver disabled, See Figure 8 3 9 ms
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