Datasheet
TEST CIRCUIT
VOLTAGE WAVEFORMS
1.5 V
V
OH
t
PHZ
t
PZH
0 V
3 V
1.5 V
2.3 V
Output
Input
Output
S1
0 V or 3 V
R
L
= 110 Ω
50 Ω
V
off
≈ 0
0.5 V
D
Y
Z
DE
Input
Generator
(see Note A)
C
L
= 50 pF
(see Note B)
Output
TEST CIRCUIT VOLTAGE WAVEFORMS
V
OL
t
PLZ
t
PZL
5 V
0.5 V
2.3 V
0 V
3 V
1.5 V1.5 V
5 V
Output
Input
S1
0 V or 3 V
50 Ω
R
L
= 110 Ω
D
Y
Z
DE
Input
Generator
(see Note A)
C
L
= 50 pF
(see Note B)
TEST CIRCUIT VOLTAGE WAVEFORMS
V
OL
V
OH
3 V
0 V
t
PHL
t
PLH
Output
Input
1.5 V
1.3 V
1.5 V
1.3 V
50 Ω
Output
0 V
1.5 V
Generator
(see Note A)
A
B
RE
R
10%
90%90%
10%
t
t
t
t
Input
C
L
= 15 pF
(see Note B)
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t
r
≤ 6 ns, t
f
≤ 6 ns,
Z
O
= 50 Ω.
B. C
L
includes probe and jig capacitance.
SN55LBC180
SN65LBC180
SN75LBC180
www.ti.com
................................................................................................................................................... SLLS174G – FEBRUARY 1994 – REVISED APRIL 2009
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 4. Driver Test Circuit and Enable and Disable Time Waveforms
Figure 5. Driver Test Circuit and Enable and Disable Time Voltage Waveforms
Figure 6. Receiver Test Circuit and Propagation Delay Time Voltage Waveforms
Copyright © 1994 – 2009, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): SN55LBC180 SN65LBC180 SN75LBC180