Datasheet

PTH05T210
2,6
5, 9
13
+
12
VI
Track
GND
TT
7,83,4
GND
GND
+Sense
10
L
O
A
D
−Sense
GND
+
1
Inhibit
INH/UVLO
Track
14
11
−Sense
+Sense
UDG−05097
R
TT
1%
0.05 W
(Optional)
C
O
470 µF
(Required)
V
O
R
SET
1%
0.05 W
(Required)
C
I
1000 µF
(Required)
R
UVLO
1%
0.05 W
(Opional)
V
O
Adj
TurboTranst
V
O
V
I
PTH05T210W
SLTS263I AUGUST 2007 REVISED MARCH 2009 ......................................................................................................................................................
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
A. R
SET
is required to set the output voltage higher than 0.7 V. See the Electrical Characteristics table.
ORDERING INFORMATION
For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see
the TI website at www.ti.com.
2 Submit Documentation Feedback Copyright © 2007 2009, Texas Instruments Incorporated
Product Folder Link(s): PTH05T210W