Datasheet

PCM9211
SBAS495 –JUNE 2010 www.ti.com
Register 5Ah–5Fh, DIR Channel Status Data Buffer
(Address : 5Ah–5Fh, Read-Only)
DATA
Address B7 B6 B5 B4 B3 B2 B1 B0
RXCS7 RXCS6 RXCS5 RXCS4 RXCS3 RXCS2 RXCS1 RXCS0
5Ah
CS Bit7 CS Bit6 CS Bit5 CS Bit4 CS Bit3 CS Bit2 CS Bit1 CS Bit0
RXCS15 RXCS14 RXCS13 RXCS12 RXCS11 RXCS10 RXCS9 RXCS8
5Bh
CS Bit15 CS Bit14 CS Bit13 CS Bit12 CS Bit11 CS Bit10 CS Bit9 CS Bit8
RXCS23 RXCS22 RXCS21 RXCS20 RXCS19 RXCS18 RXCS17 RXCS16
5Ch
CS Bit23 CS Bit22 CS Bit21 CS Bit20 CS Bit19 CS Bit18 CS Bit17 CS Bit16
RXCS31 RXCS30 RXCS29 RXCS28 RXCS27 RXCS26 RXCS25 RXCS24
5Dh
CS Bit31 CS Bit30 CS Bit29 CS Bit28 CS Bit27 CS Bit26 CS Bit25 CS Bit24X
RXCS39 RXCS38 RXCS37 RXCS36 RXCS35 RXCS34 RXCS33 RXCS32
5Eh
CS Bit39 CS Bit38 CS Bit37 CS Bit36 CS Bit35 CS Bit34 CS Bit33 CS Bit32
RXCS47 RXCS46 RXCS45 RXCS44 RXCS43 RXCS42 RXCS41 RXCS40
5Fh
CS Bit47 CS Bit46 CS Bit45 CS Bit44 CS Bit43 CS Bit42 CS Bit41 CS Bit40
RXCS0: Use of channel status block
RXCS1: Linear PCM information
RXCS2: Copyright information
RXCS5 – RXCS3: Additional format information
RXCS7– RXCS6: Channel status mode
RXCS15 – RXCS8: Category code
RXCS19 – RXCS16: Source number
RXCS23 – RXCS20: Channel number
RXCS27 – RXCS24: Sampling frequency
RXCS29 – RXCS28: Clock accuracy
RXCS31 – RXCS30: Not defined
RXCS32: Maximum audio sample word length
RXCS35 – RXCS33: Sample word length
RXCS39 – RXCS36: Original sampling frequency
RXCS47 – RXCS40: Not defined
xx of RXCSxx represents the serial number of the channel status data. L-channel data of the channel status is
stored in this register. Its default value is not specified. Therefore, wait until the ERROR/INT0 port goes low and
192 samples pass to read RXCS. RXCS is cleared when DIR unlocks and an L-ch parity error is detected.
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