Datasheet

PCM9211
www.ti.com SBAS495 –JUNE 2010
Register 77h, MPIO_C3, MPIO_C2 Output Flag Select
(Address: 77h, Write and Read)
DATA B7 B6 B5 B4 B3 B2 B1 B0
Reg Name MPC3FLG3 MPC3FLG2 MPC3FLG1 MPC3FLG0 MPC2FLG3 MPC2FLG2 MPC2FLG1 MPC2FLG0
Default Value 0 0 0 0 0 0 0 0
Memo
MPC3FLG[3:0]: MPIO_C3 Pin, Flag Select
0000: CLKST (default)
0001: EMPH
0010: BPSYNC
0011: DTSCD
0100: PARITY
0101: LOCK
0110: VOUT
0111: UOUT
1000: COUT
1001: BFRAME
1010: FSOUT0
1011: FSOUT1
1100: FSOUT2
1101: FSOUT3
1110: INT0
1111: INT1
MPC2FLG[3:0]: MPIO_C2 Pin, Flag Select
0000: CLKST (default)
0001: EMPH
0010: BPSYNC
0011: DTSCD
0100: PARITY
0101: LOCK
0110: VOUT
0111: UOUT
1000: COUT
1001: BFRAME
1010: FSOUT0
1011: FSOUT1
1100: FSOUT2
1101: FSOUT3
1110: INT0
1111: INT1
These register settings are effective only at MPCSEL[2:0] = '011', MPC3SEL = '0', and MPC2SEL = '0'.
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