Datasheet

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PIN ASSIGNMENTS
1
2
3
4
5
6
7
19
18
17
16
15
14
13
8 9 10
11 12
24 23 22 21 20
V
COM
AIN2R
AIN2L
MODE
DOUT
V
IO
V
DD
DGND
SCKI
MS/ADR
MD/SDA
MC/SCL
PGINL
RHFPackage
(TopView)
AOL
PGINR
AOR
TEST
LRCK
BCK
AGND
V
CC
MICB
AIN1L AIN1R
P0057-01
YZFPackage
(TopView)
V
COM
AIN2R AIN2L
MODE
DOUT
V
IO
V
DD
DGND
SCKI
MS/ADR MD/SDA
MC/SCL
PGINL
AOL
PGINR
AOR
TEST
LRCK
BCK
AGND
V
CC
MICB
AIN1LAIN1R
A
B
C
D
E
F
1 2 3
4
PCM1870
SLAS544A – MAY 2007 – REVISED SEPTEMBER 2007
Table 1. TERMINAL FUNCTIONS
TERMINAL
NO. I/O DESCRIPTION
NAME
RHF YZF
AGND 24 B4 – Ground for analog
AIN1L 21 A2 I Analog input 1 for L-channel
AIN1R 20 A1 I Analog input 1 for R-channel
AIN2L 3 C4 I Analog input 2 for L-channel
AIN2R 2 C3 I Analog input 2 for R-channel
AOL 18 C2 O Microphone amplifier output for L-channel
AOR 16 C1 O Microphone amplifier output for R-channel
BCK 13 F1 I/O Serial bit clock
DGND 11 E2 – Ground for digital
DOUT 8 F4 O Serial audio data output
LRCK 14 E1 I/O Left- and right-channel clock
MC/SCL 7 E4 I Mode control clock for 3-wire / 2-wire interface
MD/SDA 6 D4 I/O Mode control data for 3-wire / 2-wire interface
MICB 22 A3 O Microphone bias source output
MODE 4 D2 I 2- or 3-wire interface selection (LOW: SPI, HIGH: I
2
C)
MS/ADR 5 D3 I Mode control select for 3-wire / 2-wire interface
PGINL 19 B2 I Analog input to gain amplifier for L-channel
PGINR 17 B1 I Analog input to gain amplifier for R-channel
SCKI 12 F2 I System clock
TEST 15 D1 I Test Pin. Should be connected to ground.
V
CC
23 B3 – Power supply for analog
V
COM
1 A4 – Common voltage for analog
V
DD
10 F3 – Power supply for digital core
V
IO
9 E3 – Power supply for digital I/O
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Product Folder Link(s): PCM1870