Datasheet

PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
IN
L
V
REF
1
REFCOM
V
REF
2
V
IN
R
RSTB
BYPAS
FMT0
FMT1
MODE0
MODE1
FSYNC
AGND
V
CC
C
IN
PL
C
IN
NL
C
IN
PR
C
IN
NR
V
DD
DGND
SYSCLK
DOUT
BCK
LRCK
PCM1800
(TOP VIEW)
P0004-01
PCM1800
SBAS071B OCTOBER 2000 REVISED AUGUST 2008 ...............................................................................................................................................
www.ti.com
PIN ASSIGNMENTS
NAME PIN I/O DESCRIPTION
AGND 24 Analog ground
BCK 14 I/O Bit clock input/output
BYPAS 7 I High-pass filter bypass control
(1)
C
IN
NL 21 Antialias filter capacitor ( ), Lch
C
IN
NR 19 Antialias filter capacitor ( ), Rch
C
IN
PL 22 Antialias filter capacitor (+), Lch
C
IN
PR 20 Antialias filter capacitor (+), Rch
DGND 17 Digital ground
DOUT 15 O Audio data output
FMT0 8 I Audio data format 0
(1)
FMT1 9 I Audio data format 1
(1)
FSYNC 12 I/O Frame synchronization, input/output
LRCK 13 I/O Sampling clock input/output (f
S
)
MODE0 10 I Master/slave mode selection 0
(1)
MODE1 11 I Master/slave mode selection 1
(1)
REFCOM 3 Reference decoupling common
SYSCLK 16 I System clock input, 256 f
S
, 384 f
S
, or 512 f
S
RSTB 6 I Reset input, active LOW
(1)
V
CC
23 Analog power supply
V
DD
18 Digital power supply
V
IN
L 1 I Analog input, Lch
V
IN
R 5 I Analog input, Rch
V
REF
1 2 Reference 1 decoupling capacitor
V
REF
2 4 Reference 2 decoupling capacitor
(1) With 100-k typical pulldown resistor
PACKAGE/ORDERING INFORMATION
PRODUCT PACKAGE PACKAGE PACKAGE ORDERING TRANSPORT QUANTITY
TYPE CODE MARKING NUMBER MEDIA
PCM1800E Rails 58
PCM1800E 24-pin SSOP DB PCM1800E
PCM1800E/2K Tape and reel 2000
4 Submit Documentation Feedback Copyright © 2000 2008, Texas Instruments Incorporated
Product Folder Link(s): PCM1800