6–5
6.8 PCI Bus Parameter Measurement Information
t
wH
2 V
0.8 V
t
r
t
f
t
c
t
wL
2 V min Peak-to-Peak
Figure 6–2. PCLK Timing Waveform
t
w
t
su
PCLK
RSTIN
Figure 6–3. RSTIN Timing Waveforms
1.5 V
t
pd
t
pd
Valid
1.5 V
t
on
t
off
Valid
t
su
t
h
PCLK
PCI Output
PCI Input
Figure 6–4. Shared-Signals Timing Waveforms
