Datasheet

22
I/O
Port
P17−P10
Shift
Register
16 Bits
LP Filter
Interrupt
Logic
Input
Filter
23
Power-On
Reset
Read Pulse
Write Pulse
PCA9535
3
2
21
1
24
12
GND
V
CC
SDA
SCL
A2
A1
A0
INT
I
2
C Bus
Control
P07−P00
PCA9535
SCPS129I AUGUST 2005 REVISED MAY 2008 ...........................................................................................................................................................
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LOGIC DIAGRAM (POSITIVE LOGIC)
A. Pin numbers shown are for DB, DBQ, DGV, DW, and PW packages.
B. All I/Os are set to inputs at reset.
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