Datasheet

DESIGN-IN TOOLS
DEMONSTRATION FIXTURES
DRIVING CAPACITIVE LOADS
MACROMODEL AND APPLICATIONS
OPERATING SUGGESTIONS
OUTPUT CURRENT AND VOLTAGES
OPA3832
www.ti.com ............................................................................................................................................ SBOS370A – DECEMBER 2006 – REVISED AUGUST 2008
the available output voltage and current will always
be greater than that shown in the over-temperature
specifications, because the output stage junction
temperatures will be higher than the minimum
Two printed circuit boards (PCBs) are available to
specified operating ambient.
assist in the initial evaluation of circuit performance
using the OPA3832 in its two package options. Both To maintain maximum output stage linearity, no
of these are offered free of charge as unpopulated output short-circuit protection is provided. This
PCBs, delivered with a user's guide. The summary configuration will not normally be a problem, since
information for these fixtures is shown in Table 1 . most applications include a series matching resistor
at the output that will limit the internal power
Table 1. Demonstration Fixtures by Package dissipation if the output side of this resistor is shorted
to ground. However, shorting the output pin directly to
ORDERING LITERATURE
the adjacent positive power-supply pin (8-pin
PRODUCT PACKAGE NUMBER NUMBER
packages) will, in most cases, destroy the amplifier. If
OPA3832ID SO-14 DEM-OPA-SO-3B SBOU018
additional short-circuit protection is required, consider
OPA3832IPW TSSOP-14 DEM-OPA-SSOP-3B SBOU019
a small series resistor in the power-supply leads. This
resistor will reduce the available output voltage swing
The demonstration fixtures can be requested at the
under heavy output loads.
Texas Instruments web site (www.ti.com ) through the
OPA3832 product folder.
One of the most demanding and yet very common
SUPPORT
load conditions for an op amp is capacitive loading.
Often, the capacitive load is the input of an
Computer simulation of circuit performance using
Analog-to-Digital Converter (ADC) — including
SPICE is often a quick way to analyze the
additional external capacitance which may be
performance of the OPA3832 and its circuit designs.
recommended to improve ADC linearity. A
This is particularly true for video and RF amplifier
high-speed, high open-loop gain amplifier like the
circuits where parasitic capacitance and inductance
OPA3832 can be very susceptible to decreased
can play a major role on circuit performance. A
stability and closed-loop response peaking when a
SPICE model for the OPA3832 is available through
capacitive load is placed directly on the output pin.
the TI web page (www.ti.com ). The applications
When the primary considerations are frequency
department is also available for design assistance.
response flatness, pulse response fidelity, and/or
These models predict typical small signal ac,
distortion, the simplest and most effective solution is
transient steps, dc performance, and noise under a
to isolate the capacitive load from the feedback loop
wide variety of operating conditions. The models
by inserting a series isolation resistor between the
include the noise terms found in the electrical
amplifier output and the capacitive load.
specifications of the data sheet. These models do not
attempt to distinguish between the package types in
The Typical Characteristic curves show the
their small-signal ac performance.
recommended R
S
versus capacitive load and the
resulting frequency response at the load. Parasitic
capacitive loads greater than 2pF can begin to
degrade the performance of the OPA3832. Long PCB
traces, unmatched cables, and connections to
multiple devices can easily exceed this value. Always
The OPA3832 provides outstanding output voltage
consider this effect carefully, and add the
capability. For the +5V supply, under no-load
recommended series resistor as close as possible to
conditions at +25 ° C, the output voltage typically
the output pin (see the Board Layout Guidelines
swings closer than 90mV to either supply rail.
section).
The minimum specified output voltage and current
The criterion for setting this R
S
resistor is a maximum
specifications over temperature are set by worst-case
bandwidth, flat frequency response at the load. For a
simulations at the cold temperature extreme. Only at
gain of +2, the frequency response at the output pin
cold startup will the output current and voltage
is already slightly peaked without the capacitive load,
decrease to the numbers shown in the ensured
requiring relatively high values of R
S
to flatten the
tables. As the output transistors deliver power, the
response at the load. Increasing the noise gain will
junction temperatures will increase, decreasing the
also reduce the peaking.
V
BE
s (increasing the available output voltage swing)
and increasing the current gains (increasing the
available output current). In steady-state operation,
Copyright © 2006 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Link(s): OPA3832