Datasheet
OPA836
OPA2836
SLOS712E –JANUARY 2011–REVISED SEPTEMBER 2013
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGING/ORDERING INFORMATION
(1)
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
UNITS
V
S–
to V
S+
Supply voltage 5.5
V
I
Input voltage V
S–
- 0.7V to V
S+
+ 0.7V
V
ID
Differential input voltage 1 V
I
I
Continuous input current 0.85 mA
I
O
Continuous output current 60 mA
Continuous power dissipation See Thermal Characteristics Specification
T
J
Maximum junction temperature 150°C
T
A
Operating free-air temperature range –40°C to 125°C
T
stg
Storage temperature range –65°C to 150°C
HBM 6 kV
ESD
CDM 1 kV
ratings
MM 200 V
THERMAL INFORMATION
OPA836 OPA2836
VSSOP
THERMAL METRIC
(1)
SOT23-6 WQFN-10 SOIC-8 (MSOP)-10 WQFN-10 UQFN-10 UNITS
(DBV) (RUN) (D) (DGS) (RUN) (RMC)
6 PINS 10 PINS 8 PINS 10 PINS 10 PINS 10 PINS
θ
JA
Junction-to-ambient thermal resistance 194 145.8 150.1 206 145.8 143.2
θ
JCtop
Junction-to-case (top) thermal resistance 129.2 75.1 83.8 75.3 75.1 49.0
θ
JB
Junction-to-board thermal resistance 39.4 38.9 68.4 96.2 38.9 61.9
°C/W
ψ
JT
Junction-to-top characterization parameter 25.6 13.5 33.0 12.9 13.5 3.3
ψ
JB
Junction-to-board characterization parameter 38.9 104.5 67.9 94.6 104.5 61.9
θ
JCbot
Junction-to-case (bottom) thermal resistance n/a n/a n/a n/a n/a n/a
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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