Datasheet

APPLICATIONS INFORMATION
WIDEBAND VOLTAGE-FEEDBACK
1/2
OPA2832
V
S
= +3.3V
V
OUT
66.5
V
IN
1.13k
255
R
L
150
0.75V
6.8
µ
F
+
0.1
µ
F
0.1
µ
F
400
400
+0.75V
+0.75
1/2
OPA2832
V
S
= +5V
V
OUT
66.7
V
IN
505
+V
S
/2
332
R
L
150
+V
S
2
6.8
µ
F
+
0.1
µ
F
0.1
µ
F
400
400
2V
OPA2832
SBOS327C FEBRUARY 2005 REVISED AUGUST 2008 .............................................................................................................................................
www.ti.com
ground. Voltage swings reported in the Electrical
Characteristics are taken directly at the input and
output pins. For the circuit of Figure 62 , the total
OPERATION
effective load on the output at high frequencies is
The OPA2832 is a unity-gain stable, very high-speed
150 || 800 . The 255 and 1.13k resistors at the
voltage-feedback op amp designed for single-supply
noninverting input provide the common-mode bias
operation (+3V to +11V). The input stage supports
voltage. Their parallel combination equals the DC
input voltages below ground and to within 1.7V of the
resistance at the inverting input R
F
), reducing the DC
positive supply. The complementary common-emitter
output offset due to input bias current.
output stage provides an output swing to within 25mV
of ground and the positive supply. The OPA2832 is
compensated to provide stable operation with a wide
range of resistive loads.
Figure 61 shows the AC-coupled, gain of +2
configuration used for the +5V Specifications and
Typical Characteristic Curves. For test purposes, the
input impedance is set to 50 with the 66.7 resistor
to ground in parallel with the 200 bias network.
Voltage swings reported in the Electrical
Characteristics are taken directly at the input and
output pins. For the circuit of Figure 61 , the total
effective load on the output at high frequencies is
150 || 800 . The 332 and 505 resistors at the
noninverting input provide the common-mode bias
voltage. Their parallel combination equals the DC
resistance at the inverting input R
F
), reducing the DC
output offset due to input bias current.
Figure 62. AC-Coupled, G = +2, +3V Single-Supply
Specification and Test Circuit
Figure 63 shows the DC-coupled, gain of +2, dual
power-supply circuit configuration used as the basis
of the ± 5V Electrical Characteristics and Typical
Characteristics. For test purposes, the input
impedance is set to 50 with a resistor to ground and
the output impedance is set to 150 with a series
output resistor. Voltage swings reported in the
specifications are taken directly at the input and
output pins. For the circuit of Figure 63 , the total
effective load will be 150 || 800 . Two optional
components are included in Figure 63 . An additional
resistor (175 ) is included in series with the
noninverting input. Combined with the 25 DC
source resistance looking back towards the signal
generator, this gives an input bias current cancelling
resistance that matches the 200 source resistance
Figure 61. AC-Coupled, G = +2, +5V Single-Supply
seen at the inverting input (see the DC Accuracy and
Specification and Test Circuit
Offset Control section). In addition to the usual
power-supply decoupling capacitors to ground, a
Figure 62 shows the AC-coupled, gain of +2
0.01 µ F capacitor is included between the two
configuration used for the +3.3V Specifications and
power-supply pins. In practical PC board layouts, this
Typical Characteristic Curves. For test purposes, the
optional capacitor will typically improve the
input impedance is set to 66.5 with a resistor to
2nd-harmonic distortion performance by 3dB to 6dB.
20 Submit Documentation Feedback Copyright © 2005 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA2832