Datasheet

W
W
W
W
OPA170
R =
I
10kW
R
OUT
C
L
R
F
=10kW
+18V
-18V
G= 1-
W
W
W
W
+18V
-18V
R
OUT
C
L
OPA170
R
L
G=+1
5kW
OPA170
10mAmax
V+
V
IN
V
OUT
I
OVERLOAD
OPA170
OPA2170
OPA4170
SBOS557B AUGUST 2011REVISED SEPTEMBER 2012
www.ti.com
CAPACITIVE LOAD AND STABILITY
or even the output pin. Each of these different pin
The dynamic characteristics of the OPAx170 have functions have electrical stress limits determined by
been optimized for common operating conditions. The the voltage breakdown characteristics of the
combination of low closed-loop gain and high particular semiconductor fabrication process and
capacitive loads decreases the phase margin of the specific circuits connected to the pin. Additionally,
amplifier and can lead to gain peaking or oscillations. internal electrostatic discharge (ESD) protection is
As a result, heavier capacitive loads must be isolated built into these circuits to protect them from
from the output. The simplest way to achieve this accidental ESD events both before and during
isolation is to add a small resistor (for example, R
OUT
product assembly.
equal to 50Ω) in series with the output. Figure 38 and
These ESD protection diodes also provide in-circuit,
Figure 39 illustrate graphs of small-signal overshoot
input overdrive protection, as long as the current is
versus capacitive load for several values of R
OUT
.
limited to 10mA as stated in the Absolute Maximum
Also, refer to Applications Bulletin AB-028, Feedback
Ratings. Figure 40 shows how a series input resistor
Plots Define Op Amp AC Performance (literature
may be added to the driven input to limit the input
number SBOA015, available for download from the TI
current. The added resistor contributes thermal noise
website), for details of analysis techniques and
at the amplifier input and its value should be kept to a
application circuits.
minimum in noise-sensitive applications.
Figure 40. Input Current Protection
An ESD event produces a short duration, high-
voltage pulse that is transformed into a short
duration, high-current pulse as it discharges through
a semiconductor device. The ESD protection circuits
Figure 38. Small-Signal Overshoot versus
are designed to provide a current path around the
Capacitive Load (100mV Output Step, G = +1)
operational amplifier core to prevent it from being
damaged. The energy absorbed by the protection
circuitry is then dissipated as heat.
When the operational amplifier connects into a circuit,
the ESD protection components are intended to
remain inactive and not become involved in the
application circuit operation. However, circumstances
may arise where an applied voltage exceeds the
operating voltage range of a given pin. Should this
condition occur, there is a risk that some of the
internal ESD protection circuits may be biased on,
and conduct current. Any such current flow occurs
through ESD cells and rarely involves the absorption
device.
If there is an uncertainty about the ability of the
supply to absorb this current, external zener diodes
Figure 39. Small-Signal Overshoot versus
may be added to the supply pins. The zener voltage
Capacitive Load (100mV Output Step, G = –1)
must be selected such that the diode does not turn
on during normal operation. However, its zener
voltage should be low enough so that the zener diode
ELECTRICAL OVERSTRESS
conducts if the supply pin begins to rise above the
safe operating supply voltage level.
Designers often ask questions about the capability of
an operational amplifier to withstand electrical
overstress. These questions tend to focus on the
device inputs, but may involve the supply voltage pins
14 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
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