Datasheet

P1.5/TA0.0/SCLK/A5*/CA5/TMS
P1.6/TA0.1/SDO/SCL/A6*/CA6/TDI/TCLK
P1.7/CAOUT/SDI/SDA/A7*/CA7/TDO/TDI
To Module
From Module
PxOUT.y
DV
SS
DV
CC
1
TAx.y
TAxCLK
Bus
Keeper
EN
1
0
PxIN.y
EN
D
PxSEL.y
PxREN.y
1
0
PxSEL2.y
1
0
INCHx = y *
To ADC10 *
PxSEL.y
1
3
2
1
0
PxSEL2.y
From JTAG
To JTAG
PxIRQ.y
PxIE.y
EN
Set
Q
Interrupt
Edge
Select
PxSEL.y
PxIES.y
PxIFG.y
Direction
0: Input
1: Output
PxDIR.y
From Module
PxSEL.y
3
2
1
0
PxSEL2.y
ADC10AE0.y *
* Note: MSP430G2x52 devices only. MSP430G2x12 devices have no ADC10.
0
from Comparator
To Comparator
CAPD.y
MSP430G2x52
MSP430G2x12
www.ti.com SLAS722G –DECEMBER 2010–REVISED MAY 2013
Port P1 Pin Schematic: P1.5 to P1.7, Input/Output With Schmitt Trigger
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