Datasheet

MSP430FR573x
MSP430FR572x
SLAS639H –JULY 2011–REVISED SEPTEMBER 2013 www.ti.com
Memory Organization
Table 5. Memory Organization
(1) (2)
MSP430FR5726 MSP430FR5722
MSP430FR5727 MSP430FR5723
MSP430FR5728 MSP430FR5724 MSP430FR5720
MSP430FR5729 MSP430FR5725 MSP430FR5721
MSP430FR5736 MSP430FR5732 MSP430FR5730
MSP430FR5737 MSP430FR5733 MSP430FR5731
MSP430FR5738 MSP430FR5734
MSP430FR5739 MSP430FR5735
Memory (FRAM) Total Size 15.5 KB 8.0 KB 4 KB
Main: interrupt vectors 00FFFFh–00FF80h 00FFFFh–00FF80h 00FFFFh–00FF80h
Main: code memory 00FF7Fh–00C200h 00FF7Fh–00E000h 00FF7Fh–00F000h
1 KB 1 KB 1 KB
RAM
001FFFh–001C00h 001FFFh–001C00h 001FFFh–001C00h
Device Descriptor Info 128 B 128 B 128 B
(TLV) (FRAM) 001A7Fh–001A00h 001A7Fh–001A00h 001A7Fh–001A00h
N/A 0019FFh–001980h 0019FFh–001980h 0019FFh–001980h
Address space mirrored to Address space mirrored to Address space mirrored to
Info A Info A Info A
N/A 00197Fh–001900h 00197Fh–001900h 00197Fh–001900h
Address space mirrored to Address space mirrored to Address space mirrored to
Information memory
Info B Info B Info B
(FRAM)
Info A 128 B 128 B 128 B
0018FFh–001880h 0018FFh–001880h 0018FFh–001880h
Info B 128 B 128 B 128 B
00187Fh–001800h 00187Fh–001800h 00187Fh–001800h
BSL 3 512 B 512 B 512 B
0017FFh–001600h 0017FFh–001600h 0017FFh–001600h
BSL 2 512 B 512 B 512 B
0015FFh–001400h 0015FFh–001400h 0015FFh–001400h
Bootstrap loader (BSL)
memory (ROM)
BSL 1 512 B 512 B 512 B
0013FFh–001200h 0013FFh–001200h 0013FFh–001200h
BSL 0 512 B 512 B 512 B
0011FFh–001000h 0011FFh–001000h 0011FFh–001000h
Size 4 KB 4 KB 4 KB
Peripherals
000FFFh–0h 000FFFh–0h 000FFFh–0h
(1) N/A = Not available
(2) All address space not listed in this table is considered vacant memory.
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