Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller VQFN 24 (4x4) 16-Bit 8 MHz I/O number 17

MSP430FR573x

MSP430FR572x

SLAS639H –JULY 2011–REVISED SEPTEMBER 2013

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Table 3. Terminal Functions (continued)

TERMINAL

NO. I/O

(1)

DESCRIPTION

NAME

RHA RGE DA PW YQD

General-purpose digital I/O with port interrupt and wake up from

LPMx.5 (not available on package options PW, RGE)

P3.5/TB1.2/CDOUT 25 N/A 27 N/A N/A I/O

TB1 CCR2 capture: CCI2B input, compare: Out2 (not available on

devices without TB1)

Comparator_D output (not available on package options PW, RGE)

General-purpose digital I/O with port interrupt and wake up from

LPMx.5 (not available on package options PW, RGE)

TB2 CCR1 capture: CCI1B input, compare: Out1 (not available on

P3.6/TB2.1/TB1CLK 26 N/A 28 N/A N/A I/O

devices without TB2)

TB1 clock input (not available on devices without TB1 or package

options PW, RGE)

General-purpose digital I/O with port interrupt and wake up from

LPMx.5 (not available on package options PW, RGE)

P3.7/TB2.2 27 N/A 29 N/A N/A I/O

TB2 CCR2 capture: CCI2B input, compare: Out2 (not available on

devices without TB2 or package options PW, RGE)

General-purpose digital I/O with port interrupt and wake up from

LPMx.5

TB1 CCR1 capture: CCI1A input, compare: Out1 (not available on

P1.6/TB1.1/UCB0SIMO/

devices without TB1)

28 16 30 22 E2 I/O

UCB0SDA/TA0.0

Slave in, master out – eUSCI_B0 SPI mode

I2C data – eUSCI_B0 I2C mode

TA0 CCR0 capture: CCI0A input, compare: Out0

General-purpose digital I/O with port interrupt and wake up from

LPMx.5

TB1 CCR2 capture: CCI2A input, compare: Out2 (not available on

P1.7/TB1.2/UCB0SOMI/

devices without TB1)

29 17 31 23 E3 I/O

UCB0SCL/TA1.0

Slave out, master in – eUSCI_B0 SPI mode

I2C clock – eUSCI_B0 I2C mode

TA1 CCR0 capture: CCI0A input, compare: Out0

VCORE

(5)

30 18 32 24 E1 Regulated core power supply (internal use only, no external current loading)

DVSS 31 19 33 25 D2 Digital ground supply

DVCC 32 20 34 26 D1 Digital power supply

General-purpose digital I/O with port interrupt and wake up from LPMx.5 (not

P2.7 33 N/A 35 N/A N/A I/O

available on package options PW, RGE)

General-purpose digital I/O with port interrupt and wake up from

LPMx.5 (not available on package options RGE)

TA0 CCR0 capture: CCI0B input, compare: Out0 (not available on

package options RGE)

P2.3/TA0.0/UCA1STE/

34 N/A 36 27 N/A I/O

A6/CD10

Slave transmit enable – eUSCI_A1 SPI mode (not available on

devices without eUSCI_A1)

Analog input A6 – ADC (not available on devices without ADC)

Comparator_D input CD10 (not available on package options RGE)

General-purpose digital I/O with port interrupt and wake up from

LPMx.5 (not available on package options RGE)

TA1 CCR0 capture: CCI0B input, compare: Out0 (not available on

package options RGE)

P2.4/TA1.0/UCA1CLK/

35 N/A 37 28 N/A I/O

Clock signal input – eUSCI_A1 SPI slave mode, Clock signal

A7/CD11

output – eUSCI_A1 SPI master mode (not available on devices

without eUSCI_A1)

Analog input A7 – ADC (not available on devices without ADC)

Comparator_D input CD11 (not available on package options RGE)

(5) VCORE is for internal use only. No external current loading is possible. VCORE should only be connected to the recommended

capacitor value, C

VCORE