Datasheet

MSP430F673x
MSP430F672x
www.ti.com SLAS731C –DECEMBER 2011–REVISED FEBRUARY 2013
SD24_B, Power Supply and Recommended Operating Conditions
MIN TYP MAX UNIT
AV
CC
Analog supply voltage AV
CC
= DV
CC
, AV
SS
= DV
SS
= 0 V 2.4 3.6 V
f
SD
Modulator clock frequency
(1)
0.03 2.3 MHz
V
I
Absolute input voltage range AV
SS
- 1V AV
CC
V
V
IC
Common-mode input voltage range AV
SS
- 1V AV
CC
V
V
ID,FS
Differential full scale input voltage V
ID
= V
I,A+
- V
I,A-
-V
REF
/GAIN +V
REF
/GAIN
SD24GAINx = 1 ±910 ±920
SD24GAINx = 2 ±455 ±460
SD24GAINx = 4 ±227 ±230
SD24GAINx = 8 ±113 ±115
mV
Differential input voltage for specified
V
ID
SD24REFS = 1
SD24GAINx = 16 ±57 ±58
performance
(2)
SD24GAINx = 32 ±28 ±29
SD24GAINx = 64 ±14 ±14.5
SD24GAINx =
±7 ±7.2
128
C
REF
VREF load capacitance
(3)
SD24REFS = 1 100 nF
(1) Modulator clock frequency: MIN = 32.768 kHz - 10% ≈ 30 kHz. MAX = 32.768 kHz × 64 + 10% ≈ 2.3 MHz
(2) The full-scale range (FSR) is defined by V
FS+
= +V
REF
/GAIN and V
FS-
= -V
REF
/GAIN: FSR = V
FS+
- V
FS-
= 2*V
REF
/GAIN. If V
REF
is sourced
externally, the analog input range should not exceed 80% of V
FS+
or V
FS-
; i.e., V
ID
= 0.8 V
FS-
to 0.8 V
FS+
. If V
REF
is sourced internally,
the given V
ID
ranges apply.
(3) There is no capacitance required on VREF. However, a capacitance of 100nF is recommended to reduce any reference voltage noise.
SD24_B, Analog Input
(1)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
SD24GAINx = 1 5
SD24GAINx = 2 5
SD24GAINx = 4 5
C
I
Input capacitance pF
SD24GAINx = 8 5
SD24GAINx = 16 5
SD24GAINx = 32, 64, 128 5
SD24GAINx = 1 3 V 200
Input impedance
Z
I
f
SD24
= 1MHz SD24GAINx = 8 3 V 200 kΩ
(Pin A+ or A- to AV
SS
)
SD24GAINx = 32 3 V 200
SD24GAINx = 1 3 V 300 400
Differential input impedance
Z
ID
f
SD24
= 1MHz SD24GAINx = 8 3 V 400 kΩ
(Pin A+ to pin A-)
SD24GAINx = 32 3 V 300 400
(1) All parameters pertain to each SD24_B converter.
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