Datasheet

MSP430F673x
MSP430F672x
SLAS731C –DECEMBER 2011–REVISED FEBRUARY 2013 www.ti.com
TA0
TA0 is a 16-bit timer/counter (Timer_A type) with three capture/compare registers. TA0 can support multiple
capture/compares, PWM outputs, and interval timing. TA0 also has extensive interrupt capabilities. Interrupts
may be generated from the counter on overflow conditions and from each of the capture/compare registers.
Table 18. TA0 Signal Connections
MODULE OUTPUT DEVICE OUTPUT
DEVICE INPUT SIGNAL MODULE INPUT NAME MODULE BLOCK
SIGNAL SIGNAL
PM_TACLK TACLK
ACLK (internal) ACLK
Timer NA NA
SMCLK (internal) SMCLK
PM_TACLK INCLK
PM_TA0.0 CCI0A PM_TA0.0
DVSS CCI0B
CCR0 TA0
DVSS GND
DVCC VCC
PM_TA0.1 CCI1A PM_TA0.1
ADC10_A (internal)
ACLK (internal) CCI1B
ADC10SHSx = {1}
CCR1 TA1
SD24_B (internal)
DVSS GND
SD24SCSx = {1}
DVCC VCC
PM_TA0.2 CCI2A PM_TA0.2
DVSS CCI2B
CCR2 TA2
DVSS GND
DVCC VCC
TA1
TA1 is a 16-bit timer/counter (Timer_A type) with two capture/compare registers. TA1 can support multiple
capture/compares, PWM outputs, and interval timing. TA1 also has extensive interrupt capabilities. Interrupts
may be generated from the counter on overflow conditions and from each of the capture/compare registers.
Table 19. TA1 Signal Connections
DEVICE OUTPUT
MODULE OUTPUT
SIGNAL
DEVICE INPUT SIGNAL MODULE INPUT NAME MODULE BLOCK
SIGNAL
PZ
PM_TACLK TACLK
ACLK (internal) ACLK
Timer NA NA
SMCLK (internal) SMCLK
PM_TACLK INCLK
PM_TA1.0 CCI0A PM_TA1.0
DVSS CCI0B
CCR0 TA0
DVSS GND
DVCC VCC
PM_TA1.1 CCI1A PM_TA1.1
ACLK (internal) CCI1B
CCR1 TA1
DVSS GND
DVCC VCC
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