Datasheet

Table Of Contents
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526
MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521
MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513
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SLAS590L MARCH 2009REVISED MAY 2013
Crystal Oscillator, XT2
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(1) (2)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
f
OSC
= 4 MHz, XT2OFF = 0, XT2BYPASS = 0,
200
XT2DRIVEx = 0, T
A
= 25°C
f
OSC
= 12 MHz, XT2OFF = 0, XT2BYPASS = 0,
260
XT2DRIVEx = 1, T
A
= 25°C
XT2 oscillator crystal
I
DVCC.XT2
3.0 V µA
current consumption
f
OSC
= 20 MHz, XT2OFF = 0, XT2BYPASS = 0,
325
XT2DRIVEx = 2, T
A
= 25°C
f
OSC
= 32 MHz, XT2OFF = 0, XT2BYPASS = 0,
450
XT2DRIVEx = 3, T
A
= 25°C
XT2 oscillator crystal
f
XT2,HF0
XT2DRIVEx = 0, XT2BYPASS = 0
(3)
4 8 MHz
frequency, mode 0
XT2 oscillator crystal
f
XT2,HF1
XT2DRIVEx = 1, XT2BYPASS = 0
(3)
8 16 MHz
frequency, mode 1
XT2 oscillator crystal
f
XT2,HF2
XT2DRIVEx = 2, XT2BYPASS = 0
(3)
16 24 MHz
frequency, mode 2
XT2 oscillator crystal
f
XT2,HF3
XT2DRIVEx = 3, XT2BYPASS = 0
(3)
24 32 MHz
frequency, mode 3
XT2 oscillator logic-level
f
XT2,HF,SW
square-wave input XT2BYPASS = 1
(4) (3)
0.7 32 MHz
frequency, bypass mode
XT2DRIVEx = 0, XT2BYPASS = 0,
450
f
XT2,HF0
= 6 MHz, C
L,eff
= 15 pF
XT2DRIVEx = 1, XT2BYPASS = 0,
320
f
XT2,HF1
= 12 MHz, C
L,eff
= 15 pF
Oscillation allowance for
OA
HF
Ω
HF crystals
(5)
XT2DRIVEx = 2, XT2BYPASS = 0,
200
f
XT2,HF2
= 20 MHz, C
L,eff
= 15 pF
XT2DRIVEx = 3, XT2BYPASS = 0,
200
f
XT2,HF3
= 32 MHz, C
L,eff
= 15 pF
f
OSC
= 6 MHz, XT2BYPASS = 0, XT2DRIVEx = 0,
0.5
T
A
= 25°C, C
L,eff
= 15 pF
t
START,HF
Startup time 3.0 V ms
f
OSC
= 20 MHz, XT2BYPASS = 0, XT2DRIVEx = 2,
0.3
T
A
= 25°C, C
L,eff
= 15 pF
Integrated effective load
C
L,eff
capacitance, HF 1 pF
mode
(6)(1)
Duty cycle Measured at ACLK, f
XT2,HF2
= 20 MHz 40 50 60 %
Oscillator fault
f
Fault,HF
XT2BYPASS = 1
(8)
30 300 kHz
frequency
(7)
(1) Requires external capacitors at both terminals. Values are specified by crystal manufacturers. In general, an effective load capacitance
of up to 18 pF can be supported.
(2) To improve EMI on the XT2 oscillator the following guidelines should be observed.
(a) Keep the traces between the device and the crystal as short as possible.
(b) Design a good ground plane around the oscillator pins.
(c) Prevent crosstalk from other clock or data lines into oscillator pins XT2IN and XT2OUT.
(d) Avoid running PCB traces underneath or adjacent to the XT2IN and XT2OUT pins.
(e) Use assembly materials and praxis to avoid any parasitic load on the oscillator XT2IN and XT2OUT pins.
(f) If conformal coating is used, ensure that it does not induce capacitive or resistive leakage between the oscillator pins.
(3) This represents the maximum frequency that can be input to the device externally. Maximum frequency achievable on the device
operation is based on the frequencies present on ACLK, MCLK, and SMCLK cannot be exceed for a given range of operation.
(4) When XT2BYPASS is set, the XT2 circuit is automatically powered down. Input signal is a digital square wave with parametrics defined
in the Schmitt-trigger Inputs section of this data sheet.
(5) Oscillation allowance is based on a safety factor of 5 for recommended crystals.
(6) Includes parasitic bond and package capacitance (approximately 2 pF per pin).
Since the PCB adds additional capacitance, it is recommended to verify the correct load by measuring the ACLK frequency. For a
correct setup, the effective load capacitance should always match the specification of the used crystal.
(7) Frequencies below the MIN specification set the fault flag. Frequencies above the MAX specification do not set the fault flag.
Frequencies in between might set the flag.
(8) Measured with logic-level input frequency but also applies to operation with crystals.
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