Datasheet
Table Of Contents
- Features
- Applications
- Description
- Development Tools Support
- Device and Development Tool Nomenclature
- Short-Form Description
- CPU
- Operating Modes
- Interrupt Vector Addresses
- Memory Organization
- Bootstrap Loader (BSL)
- JTAG Operation
- Flash Memory
- RAM Memory
- Peripherals
- Digital I/O
- Port Mapping Controller
- Oscillator and System Clock
- Power Management Module (PMM)
- Hardware Multiplier
- Real-Time Clock (RTC_A)
- Watchdog Timer (WDT_A)
- System Module (SYS)
- DMA Controller
- Universal Serial Communication Interface (USCI)
- TA0
- TA1
- TA2
- TB0
- Comparator_B
- ADC12_A
- CRC16
- REF Voltage Reference
- Embedded Emulation Module (EEM)
- Peripheral File Map
- Absolute Maximum Ratings
- Thermal Packaging Characteristics
- Recommended Operating Conditions
- Electrical Characteristics
- Active Mode Supply Current Into VCC Excluding External Current
- Low-Power Mode Supply Currents (Into VCC) Excluding External Current
- Schmitt-Trigger Inputs – General Purpose I/O (P1.0 to P1.7, P2.7, P3.0 to P3.4, P4.0 to P4.7) (P5.0 to P5.5, P5.7, P6.1 to P6.5, PJ.0 to PJ.3, RST/NMI)
- Inputs – Ports P1 and P2 (P1.0 to P1.7, P2.0 to P2.7)
- Leakage Current – General Purpose I/O (P1.0 to P1.7, P2.7, P3.0 to P3.4, P4.0 to P4.7) (P5.0 to P5.5, P5.7, P6.1 to P6.5, PJ.0 to PJ.3, RST/NMI)
- Outputs – General Purpose I/O (Full Drive Strength) (P1.0 to P1.7, P2.7, P3.0 to P3.4, P4.0 to P4.7) (P5.0 to P5.5, P5.7, P6.1 to P6.5, PJ.0 to PJ.3)
- Outputs – General Purpose I/O (Reduced Drive Strength) (P1.0 to P1.7, P2.7, P3.0 to P3.4, P4.0 to P4.7) (P5.0 to P5.5, P5.7, P6.1 to P6.5, PJ.0 to PJ.3)
- Output Frequency – General Purpose I/O (P1.0 to P1.7, P2.7, P3.0 to P3.4, P4.0 to P4.7) (P5.0 to P5.5, P5.7, P6.1 to P6.5, PJ.0 to PJ.3)
- Typical Characteristics – Outputs, Reduced Drive Strength (PxDS.y = 0)
- Typical Characteristics – Outputs, Full Drive Strength (PxDS.y = 1)
- Crystal Oscillator, XT1, Low-Frequency Mode
- Crystal Oscillator, XT2
- Internal Very-Low-Power Low-Frequency Oscillator (VLO)
- Internal Reference, Low-Frequency Oscillator (REFO)
- DCO Frequency
- PMM, Brown-Out Reset (BOR)
- PMM, Core Voltage
- PMM, SVS High Side
- PMM, SVM High Side
- PMM, SVS Low Side
- PMM, SVM Low Side
- Wake Up From Low Power Modes and Reset
- Timer_A
- Timer_B
- USCI (UART Mode) Recommended Operating Conditions
- USCI (UART Mode)
- USCI (SPI Master Mode) Recommended Operating Conditions
- USCI (SPI Master Mode)
- USCI (SPI Slave Mode)
- USCI (I2C Mode)
- 12-Bit ADC, Power Supply and Input Range Conditions
- 12-Bit ADC, Timing Parameters
- 12-Bit ADC, Linearity Parameters Using an External Reference Voltage or AVCC as Reference Voltage
- 12-Bit ADC, Linearity Parameters Using the Internal Reference Voltage
- 12-Bit ADC, Temperature Sensor and Built-In VMID
- REF, External Reference
- REF, Built-In Reference
- Comparator B
- Flash Memory
- JTAG and Spy-Bi-Wire Interface
- Input/Output Schematics
- Port P1, P1.0 to P1.7, Input/Output With Schmitt Trigger
- Port P2, P2.7, Input/Output With Schmitt Trigger
- Port P3, P3.0 to P3.4, Input/Output With Schmitt Trigger
- Port P4, P4.0 to P4.7, Input/Output With Schmitt Trigger
- Port P5, P5.0 and P5.1, Input/Output With Schmitt Trigger
- Port P5, P5.2, Input/Output With Schmitt Trigger
- Port P5, P5.3, Input/Output With Schmitt Trigger
- Port P5, P5.4 and P5.5 Input/Output With Schmitt Trigger
- Port P5, P5.7, Input/Output With Schmitt Trigger
- Port P6, P6.1 to P6.5, Input/Output With Schmitt Trigger
- Port J, J.0 JTAG pin TDO, Input/Output With Schmitt Trigger or Output
- Port J, J.1 to J.3 JTAG pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
- Device Descriptors
- Revision History
MSP430F5342, MSP430F5341, MSP430F5340
www.ti.com
SLAS706E –JULY 2011–REVISED AUGUST 2013
DEVICE DESCRIPTORS
Table 54 lists the complete contents of the device descriptor tag-length-value (TLV) structure for each device
type.
Table 54. 'F534x Device Descriptor Table
(1)
'F5342 'F5341 'F5340
Size
Description Address
bytes
Value Value Value
Info Block Info length 01A00h 1 06h 06h 06h
CRC length 01A01h 1 06h 06h 06h
CRC value 01A02h 2 per unit per unit per unit
Device ID 01A04h 1 1Eh 1Dh 1Ch
Device ID 01A05h 1 81h 81h 81h
Hardware revision 01A06h 1 per unit per unit per unit
Firmware revision 01A07h 1 per unit per unit per unit
Die Record Die Record Tag 01A08h 1 08h 08h 08h
Die Record length 01A09h 1 0Ah 0Ah 0Ah
Lot/Wafer ID 01A0Ah 4 per unit per unit per unit
Die X position 01A0Eh 2 per unit per unit per unit
Die Y position 01A10h 2 per unit per unit per unit
Test results 01A12h 2 per unit per unit per unit
ADC12 Calibration ADC12 Calibration Tag 01A14h 1 11h 11h 11h
ADC12 Calibration length 01A15h 1 10h 10h 10h
ADC Gain Factor 01A16h 2 per unit per unit per unit
ADC Offset 01A18h 2 per unit per unit per unit
ADC 1.5-V Reference
01A1Ah 2 per unit per unit per unit
Temp. Sensor 30°C
ADC 1.5-V Reference
01A1Ch 2 per unit per unit per unit
Temp. Sensor 85°C
ADC 2.0-V Reference
01A1Eh 2 per unit per unit per unit
Temp. Sensor 30°C
ADC 2.0-V Reference
01A20h 2 per unit per unit per unit
Temp. Sensor 85°C
ADC 2.5-V Reference
01A22h 2 per unit per unit per unit
Temp. Sensor 30°C
ADC 2.5-V Reference
01A24h 2 per unit per unit per unit
Temp. Sensor 85°C
REF Calibration REF Calibration Tag 01A26h 1 12h 12h 12h
REF Calibration length 01A27h 1 06h 06h 06h
REF 1.5-V Reference Factor 01A28h 2 per unit per unit per unit
REF 2.0-V Reference Factor 01A2Ah 2 per unit per unit per unit
REF 2.5-V Reference Factor 01A2Ch 2 per unit per unit per unit
Peripheral
Peripheral Descriptor Tag 01A2Eh 1 02h 02h 02h
Descriptor
Peripheral Descriptor Length 01A2Fh 1 5Eh 5Eh 5Eh
08h 08h 08h
Memory 1 2
8Ah 8Ah 8Ah
0Ch 0Ch 0Ch
Memory 2 2
86h 86h 86h
0Eh 0Eh 0Eh
Memory 3 2
2Fh 2Eh 2Dh
(1) NA = Not applicable, blank = unused and reads FFh.
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