Datasheet

MSP430F532x
www.ti.com SLAS678D –AUGUST 2010–REVISED FEBRUARY 2013
Table 3. Terminal Functions (continued)
TERMINAL
NO. I/O
(1)
DESCRIPTION
NAME
PN RGC ZQE
Regulated core power supply output (internal use only, no external current
VCORE
(2)
20 17 J2
loading)
General-purpose digital I/O with port interrupt
P1.0/TA0CLK/ACLK 21 18 H2 I/O
TA0 clock signal TA0CLK input
ACLK output (divided by 1, 2, 4, 8, 16, or 32)
General-purpose digital I/O with port interrupt
P1.1/TA0.0 22 19 H3 I/O
TA0 CCR0 capture: CCI0A input, compare: Out0 output
BSL transmit output
General-purpose digital I/O with port interrupt
P1.2/TA0.1 23 20 J3 I/O
TA0 CCR1 capture: CCI1A input, compare: Out1 output
BSL receive input
General-purpose digital I/O with port interrupt
P1.3/TA0.2 24 21 G4 I/O
TA0 CCR2 capture: CCI2A input, compare: Out2 output
General-purpose digital I/O with port interrupt
P1.4/TA0.3 25 22 H4 I/O
TA0 CCR3 capture: CCI3A input compare: Out3 output
General-purpose digital I/O with port interrupt
P1.5/TA0.4 26 23 J4 I/O
TA0 CCR4 capture: CCI4A input, compare: Out4 output
General-purpose digital I/O with port interrupt
P1.6/TA1CLK/CBOUT 27 24 G5 I/O
TA1 clock signal TA1CLK input
Comparator_B output
General-purpose digital I/O with port interrupt
P1.7/TA1.0 28 25 H5 I/O
TA1 CCR0 capture: CCI0A input, compare: Out0 output
General-purpose digital I/O with port interrupt
P2.0/TA1.1 29 26 J5 I/O
TA1 CCR1 capture: CCI1A input, compare: Out1 output
General-purpose digital I/O with port interrupt
P2.1/TA1.2 30 27 G6 I/O
TA1 CCR2 capture: CCI2A input, compare: Out2 output
General-purpose digital I/O with port interrupt
P2.2/TA2CLK/SMCLK 31 28 J6 I/O
TA2 clock signal TA2CLK input ; SMCLK output
General-purpose digital I/O with port interrupt
P2.3/TA2.0 32 29 H6 I/O
TA2 CCR0 capture: CCI0A input, compare: Out0 output
General-purpose digital I/O with port interrupt
P2.4/TA2.1 33 30 J7 I/O
TA2 CCR1 capture: CCI1A input, compare: Out1 output
General-purpose digital I/O with port interrupt
P2.5/TA2.2 34 31 J8 I/O
TA2 CCR2 capture: CCI2A input, compare: Out2 output
General-purpose digital I/O with port interrupt
P2.6/RTCCLK/DMAE0 35 32 J9 I/O
RTC clock output for calibration
DMA external trigger input
General-purpose digital I/O with port interrupt
P2.7/UCB0STE/ Slave transmit enable – USCI_B0 SPI mode
36 33 H7 I/O
UCA0CLK
Clock signal input – USCI_A0 SPI slave mode
Clock signal output – USCI_A0 SPI master mode
(2) VCORE is for internal use only. No external current loading is possible. VCORE should only be connected to the recommended
capacitor value, C
VCORE
.
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