Datasheet

P5.0/(A8/VeREF+)
P5.1/(A9/VeREF–)
P5SEL.x
1
0
P5DIR.x
P5IN.x
EN
Tomodule
1
0
Frommodule
P5OUT.x
1
0
DV
SS
DV
CC
P5REN.x
PadLogic
1
P5DS.x
0:Lowdrive
1:Highdrive
D
Bus
Keeper
to/fromReference
to ADC10
INCHx=x
MSP430F5310, MSP430F5309
MSP430F5308, MSP430F5304
SLAS677E –SEPTEMBER 2010–REVISED NOVEMBER 2013 www.ti.com
Port P5, P5.0 and P5.1, Input/Output With Schmitt Trigger
Table 49. Port P5 (P5.0 and P5.1) Pin Functions
CONTROL BITS AND SIGNALS
(1)
PIN NAME (P5.x) x FUNCTION
P5DIR.x P5SEL.x
P5.0/A8/VeREF+
(2)
0 P5.0 (I/O)
(3)
I: 0; O: 1 0
A8/VeREF+
(4)
X 1
P5.1/A9/VeREF–
(5)
1 P5.1 (I/O)
(3)
I: 0; O: 1 0
A9/VeREF–
(6)
X 1
(1) X = Don't care
(2) VeREF+ available on devices with ADC10_A.
(3) Default condition
(4) Setting the P5SEL.0 bit disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying analog
signals. An external voltage can be applied to VeREF+ and used as the reference for the ADC10_A when available.
(5) VeREF- available on devices with ADC10_A.
(6) Setting the P5SEL.1 bit disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying analog
signals. An external voltage can be applied to VeREF- and used as the reference for the ADC10_A when available.
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