Datasheet

MSP430F5310, MSP430F5309
MSP430F5308, MSP430F5304
www.ti.com SLAS677E –SEPTEMBER 2010–REVISED NOVEMBER 2013
Low-Power Mode Supply Currents (Into V
CC
) Excluding External Current
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(1) (2)
-40°C 25°C 60°C 85°C
PARAMETER V
CC
PMMCOREVx UNIT
TYP MAX TYP MAX TYP MAX TYP MAX
2.2 V 0 73 77 85 80 80 97
LPM0,1MHz
Low-power mode 0
(3) (4)
µA
3 V 3 79 83 92 88 95 105
2.2 V 0 6.5 6.5 8 7.5 8 11
I
LPM2
Low-power mode 2
(5) (4)
µA
3 V 3 7.0 7.0 9 7.9 8.9 13
0 1.60 1.90 2.6 3.4
2.2 V 1 1.65 2.00 2.7 3.6
2 1.75 2.15 2.9 3.8
Low-power mode 3,
I
LPM3,XT1LF
0 1.8 2.1 2.6 2.8 3.6 6.0 µA
crystal mode
(6) (4)
1 1.9 2.3 2.9 3.8
3 V
2 2.0 2.4 3.0 4.0
3 2.0 2.5 3.0 3.1 4.0 6.5
0 1.1 1.3 1.8 1.9 2.7 5.0
1 1.1 1.4 2.0 2.8
Low-power mode 3,
I
LPM3,VLO
3 V µA
VLO mode
(7)(4)
2 1.2 1.5 2.1 2.9
3 1.3 1.5 2.0 2.2 3.0 5.5
0 0.9 1.1 1.5 1.8 2.5 4.8
1 1.1 1.2 2.0 2.6
I
LPM4
Low-power mode 4
(8)(4)
3 V µA
2 1.2 1.2 2.1 2.7
3 1.3 1.3 1.6 2.2 2.8 5.0
I
LPM4.5
Low-power mode 4.5
(9)
3 V 0.15 0.18 0.35 0.26 0.45 0.8 µA
(1) All inputs are tied to 0 V or to V
CC
. Outputs do not source or sink any current.
(2) The currents are characterized with a Micro Crystal MS1V-T1K crystal with a load capacitance of 12.5 pF. The internal and external load
capacitance are chosen to closely match the required 12.5 pF.
(3) Current for watchdog timer clocked by SMCLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 0, OSCOFF = 0 (LPM0); f
ACLK
= 32768 Hz, f
MCLK
= 0 MHz, f
SMCLK
= f
DCO
= 1 MHz
LDO disabled (LDOEN = 0).
(4) Current for brownout, high side supervisor (SVS
H
) normal mode included. Low side supervisor and monitors disabled (SVS
L
, SVM
L
).
High side monitor disabled (SVM
H
). RAM retention enabled.
(5) Current for watchdog timer and RTC clocked by ACLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 1, OSCOFF = 0 (LPM2); f
ACLK
= 32768 Hz, f
MCLK
= 0 MHz, f
SMCLK
= f
DCO
= 0 MHz; DCO setting = 1
MHz operation, DCO bias generator enabled.
LDO disabled (LDOEN = 0)
(6) Current for watchdog timer and RTC clocked by ACLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); f
ACLK
= 32768 Hz, f
MCLK
= f
SMCLK
= f
DCO
= 0 MHz
LDO disabled (LDOEN = 0)
(7) Current for watchdog timer and RTC clocked by ACLK included. ACLK = VLO.
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); f
ACLK
= f
VLO
, f
MCLK
= f
SMCLK
= f
DCO
= 0 MHz
LDO disabled (LDOEN = 0)
(8) CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 1 (LPM4); f
DCO
= f
ACLK
= f
MCLK
= f
SMCLK
= 0 MHz
LDO disabled (LDOEN = 0)
(9) Internal regulator disabled. No data retention.
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 1, PMMREGOFF = 1 (LPM4.5); f
DCO
= f
ACLK
= f
MCLK
= f
SMCLK
= 0 MHz
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