MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 D Low Supply-Voltage Range, 1.8 V to 3.6 V D Ultra-Low Power Consumption: D D D D D D D D D − Active Mode: 280 μA at 1 MHz, 2.2 V − Standby Mode: 1.1 μA − Off Mode (RAM Retention): 0.2 μA Five Power-Saving Modes Wake-Up From Standby Mode in Less Than 6 μs 16-Bit RISC Architecture, 62.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 AVAILABLE OPTIONS PACKAGED DEVICES TA PLASTIC 100-PIN QFP (PZ) −40°C to 85°C MSP430F4783IPZ MSP430F4793IPZ MSP430F4784IPZ MSP430F4794IPZ DEVELOPMENT TOOL SUPPORT All MSP430 microcontrollers include an Embedded Emulation Module (EEM) allowing advanced debugging and programming through easy to use development tools.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 pin designation, MSP430F47xxIPZ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 MSP430F47x4IPZ P2.4/UCA0TXD/UCA0SIMO P2.5/UCA0RXD/UCA0SOMI P2.6/CAOUT P2.7 P3.0/UCB0STE/UCA0CLK P3.1/UCB0SIMO/UCB0SDA P3.2/UCB0SOMI/UCB0SCL P3.3/UCB0CLK/UCA0STE P3.4 P3.5 P3.6 P3.7 P4.0/UCA1TXD/UCA1SIMO P4.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 MSP430F47x3 functional block diagram XIN XT2IN XOUT XT2OUT 2 2 Oscillators FLL+ DVCC1/2 DVSS1/2 AVCC AVSS P1.x/P2.x 2x8 SD16_A (w/o BUF) 3 Sigma− Delta A/D Converter ACLK SMCLK MCLK Flash_A RAM 60kB 48kB 2.5kB 2.0kB P3.x/P4.x P5.x 3x8 P7.x/P8.x P9.x/P10.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION DVCC1 1 A0.0+ 2 I Digital supply voltage, positive terminal. SD16_A positive analog input A0.0 (see Note 1) A0.0− 3 I SD16_A negative analog input A0.0 (see Note 1) A1.0+ 4 I SD16_A positive analog input A1.0 (see Note 1) A1.0− 5 I SD16_A negative analog input A1.0 (see Note 1) A2.0+ 6 I SD16_A positive analog input A2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 Terminal Functions (Continued) TERMINAL NAME NO. I/O DESCRIPTION P7.2/S31 43 I/O General-purpose digital I/O / LCD segment output 31 P7.1/S32 44 I/O General-purpose digital I/O / LCD segment output 32 P7.0/S33 45 I/O General-purpose digital I/O / LCD segment output 33 P4.7/S34 46 I/O General-purpose digital I/O / LCD segment output 34 P4.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 Terminal Functions (Continued) TERMINAL NAME NO. I/O DESCRIPTION P2.5/ UCA0RXD/UCA0SOMI 74 I/O General-purpose digital I/O / USCI_A0 receive data input in UART mode, slave out/master in in SPI mode P2.4/ UCA0TXD/UCA0SIMO 75 I/O General-purpose digital I/O / USCI_A0 transmit data output in UART mode, slave in/master out in SPI mode P2.3/TB2 76 I/O General-purpose digital I/O / Timer_B3 CCR2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 short-form description CPU The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations, other than program-flow instructions, are performed as register operations in conjunction with seven addressing modes for source operand and four addressing modes for destination operand.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 operating modes The MSP430 has one active mode and five software-selectable low-power modes of operation. An interrupt event can wake up the device from any of the five low-power modes, service the request, and restore back to the low-power mode on return from the interrupt program.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 interrupt vector addresses The interrupt vectors and the power-up starting address are located in the address range 0FFFFh to 0FFE0h. The vector contains the 16-bit address of the appropriate interrupt-handler instruction sequence. If the reset vector (located at address 0FFFEh) contains 0FFFFh (e.g., flash is not programmed) the CPU goes into LPM4 immediately after power-up.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 special function registers Most interrupt and module-enable bits are collected in the lowest address space. Special-function register bits not allocated to a functional purpose are not physically present in the device. This arrangement provides simple software access.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 interrupt flag register 1 and 2 Address 7 6 5 02h 4 3 2 1 0 NMIIFG RSTIFG PORIFG OFIFG WDTIFG rw−0 rw−(0) rw−(1) rw−1 rw−(0) WDTIFG Set on watchdog timer overflow or security key violation. Reset on VCC power-up or a reset condition at RST/NMI pin in reset mode. OFIFG Flag set on oscillator fault RSTIFG External reset interrupt flag. Set on a reset condition at RST/NMI pin in reset mode.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 memory organization MSP430F4783/MSP430F4784 MSP430F4793/MSP430F4794 Memory Main: interrupt vector Main: code memory Size Flash Flash 48KB 0FFFFh to 0FFE0h 0FFFFh to 04000h 60KB 0FFFFh to 0FFE0h 0FFFFh to 01100h Information memory Size Flash 256 Byte 010FFh to 01000h 256 Byte 010FFh to 01000h Boot memory Size ROM 1KB 0FFFh to 0C00h 1KB 0FFFh to 0C00h Size 2KB 09FFh to 0200h 2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 peripherals Peripherals are connected to the CPU through data, address, and control buses and can be handled using all instructions. For complete module descriptions, see the MSP430x4xx Family User’s Guide, literature number SLAU056. digital I/O There are nine 8-bit I/O ports implemented—ports P1 through P5 and P7 through P10. D D D D D D All individual I/O bits are independently programmable.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 universal serial communication interfaces (USCI_A0, USCI_B0, USCI_A1, USCI_B1) The universal serial communication interface (USCI) module is used for serial data communication. The USCI module supports synchronous communication protocols such as SPI (3-pin or 4-pin), I2C, and asynchronous communication protocols such as UART, enhanced UART with automatic baudrate detection (LIN), and IrDA.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 timer_B3 Timer_B3 is a 16-bit timer/counter with three capture/compare registers. Timer_B3 can support multiple capture/compares, PWM outputs, and interval timing. Timer_B3 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 comparator_A The primary function of the comparator_A module is to support precision slope A/D conversions, battery-voltage supervision, and monitoring of external analog signals. SD16_A The SD16_A module integrates three (in MSP430F47x3) or four (in MSP430F47x4) independent 16-bit sigma−delta A/D converters.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 peripheral file map PERIPHERALS WITH WORD ACCESS Watchdog Watchdog timer control WDTCTL 0120h Flash_A Flash control 4 Flash control 3 Flash control 2 Flash control 1 FCTL4 FCTL3 FCTL2 FCTL1 01BEh 012Ch 012Ah 0128h Timer_B3 _ Capture/compare register 2 TBCCR2 0196h Capture/compare register 1 TBCCR1 0194h Capture/compare register 0 TBCCR0 0192h Timer_B register TBR 0190h Capture/compare control
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 peripheral file map (continued) PERIPHERALS WITH WORD ACCESS (CONTINUED) 32-bit Hardware Multiplier Sum extend SUMEXT 013Eh Result high word RESHI 013Ch Result low word RESLO 013Ah Second operand OP2 0138h Multiply signed + accumulate/operand1 MACS 0136h Multiply + accumulate/operand1 MAC 0134h Multiply signed/operand1 MPYS 0132h Multiply unsigned/operand1 MPY 0130h USCI_B0 (see also: Per
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 peripheral file map (continued) PERIPHERALS WITH BYTE ACCESS 20 SD16_A (see also: Peripherals with Word Access) Channel 0 input control Channel 1 input control Channel 2 input control Channel 3 input control Channel 0 preload Channel 1 preload Channel 2 preload Channel 3 preload Reserved (internal SD16 Configuration 1) SD16INCTL0 SD16INCTL1 SD16INCTL2 SD16INCTL3 SD16PRE0 SD16PRE1 SD16PRE2 SD16PRE3 SD16CONF1
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 peripheral file map (continued) PERIPHERALS WITH BYTE ACCESS (CONTINUED) USCI_B1 USCI_B1 transmit buffer USCI_B1 receive buffer USCI_B1 status USCI_B1 I2C interrupt enable USCI_B1 bit rate control 1 USCI_B1 bit rate control 0 USCI_B1 control 1 USCI_B1 control 0 USCI_A1 interrupt flag USCI_A1 interrupt enable UCB1TXBUF UCB1RXBUF UCB1STAT UCB1I2CIE UCB1BR1 UCB1BR0 UCB1CTL1 UCB1CTL0 UC1IFG UC1IE 0DFh 0DEh 0DDh 0D
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 peripheral file map (continued) PERIPHERALS WITH BYTE ACCESS (CONTINUED) Port P5 Port P4 Port P3 Port P2 Port P1 Special p functions 22 Port P5 resistor enable P5REN 012h Port P5 selection P5SEL 033h Port P5 direction P5DIR 032h Port P5 output P5OUT 031h Port P5 input P5IN 030h Port P4 resistor enable P4REN 011h Port P4 selection P4SEL 01Fh Port P4 direction P4DIR 01Eh Port P4 outpu
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 absolute maximum ratings (see Note 1) Voltage applied at VCC to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 4.1 V Voltage applied to any pin (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VCC + 0.3 V Diode current at any device terminal . . . . . . . . . . . . . . . . . . . . . . .
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 recommended operating conditions MIN NOM MAX UNIT Supply voltage during program execution, VCC (AVCC = DVCC = VCC) (see Note 1) 1.8 3.6 V Supply voltage during program execution, SVS enabled, PORON = 1, VCC (AVCC = DVCC = VCC) (see Notes 1, 2) 2.0 3.6 V Supply voltage during program/erase flash memory, VCC (AVCC = DVCC = VCC) (see Note 1) 2.2 3.6 V −40 85 °C VCC = 1.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) supply current into AVCC + DVCC excluding external current PARAMETER TEST CONDITIONS TYP MAX VCC = 2.2 V 280 350 VCC = 3 V 420 560 VCC = 2.2 V 45 70 VCC = 3 V 75 110 VCC = 2.2 V 11 14 VCC = 3 V 17 22 TA = −40°C 1.0 2.0 TA = 25°C 1.1 2.0 2.0 3.0 TA = 85°C 3.0 6.0 TA = −40°C 1.2 3.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 typical characteristics − active mode supply current (into VCC) 10.0 7.0 fDCO = 12 MHz 6.0 5.0 fDCO = 8 MHz 4.0 3.0 2.0 TA = 25 °C Active Mode Current − mA Active Mode Current − mA fDCO = 16 MHz 8.0 4.0 3.0 VCC = 3 V TA = 85 °C VCC = 2.2 V fDCO = 1 MHz 2.0 2.5 3.0 3.5 4.0 0.0 0.0 VCC − Supply Voltage − V Figure 2. Active mode current vs VCC, TA = 25°C 26 TA = 25 °C 2.0 1.0 1.0 0.0 1.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) Schmitt-trigger inputs − Ports P1 through P5, P7 through P10, RST/NMI, JTAG: TCK, TMS, TDI/TCLK, TDO/TDI PARAMETER VIT+ VIT− TEST CONDITIONS Positive-going P iti i input i t th threshold h ld voltage N ti i input i t threshold th h ld Negative-going voltage Vhys Input
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) outputs − Ports P1 through P5, P7 through P10 PARAMETER VOH VOL High level output voltage High-level Low level output voltage Low-level VCC MIN I(OHmax) = −1.5 mA (see Notes 1) TEST CONDITIONS 2.2 V VCC−0.25 MAX VCC UNIT I(OHmax) = −6 mA (see Notes 2) 2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) typical characteristics − outputs TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE 55.0 VCC = 2.2 V P2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) POR/brownout reset (BOR) (see Notes 1 and 2) PARAMETER TEST CONDITIONS VCC(start) (see Figure 8) dVCC/dt ≤ 3 V/s V(B_IT−) (see Figure 8 through Figure 10) dVCC/dt ≤ 3 V/s Vhys(B_IT−) (see Figure 8) dVCC/dt ≤ 3 V/s td(BOR) (see Figure 8) t(reset) Pulse length n
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) typical characteristics − POR/brownout reset (BOR) VCC 3V 2 VCC(drop) − V VCC = 3 V Typical Conditions t pw 1.5 1 VCC(drop) 0.5 0 0.001 1 1000 1 ns tpw − Pulse Width − μs 1 ns tpw − Pulse Width − μs Figure 9.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) SVS (supply voltage supervisor/monitor) (see Note 1) PARAMETER t(SVSR) TEST CONDITIONS MIN dVCC/dt > 30 V/ms (see Figure 11) MAX 150 dVCC/dt ≤ 30 V/ms 2000 td(SVSon) SVSon, switch from VLD = 0 to VLD ≠ 0, VCC = 3 V tsettle VLD ≠ 0 (see Note 2) V(SVSstart) VLD ≠ 0
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 typical characteristics Software Sets VLD>0: SVS is Active VCC V(SVS_IT−) V(SVSstart) Vhys(SVS_IT−) Vhys(B_IT−) V(B_IT−) VCC(start) BrownOut Region Brownout Region Brownout 1 0 td(BOR) SVSOut t d(BOR) SVS Circuit is Active From VLD > to VCC < V(B_IT−) 1 0 td(SVSon) Set POR 1 td(SVSR) undefined 0 Figure 11. SVS Reset (SVSR) vs Supply Voltage VCC 3V t pw 2 Rectangular Drop VCC(min) VCC(min)− V 1.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) DCO PARAMETER TEST CONDITIONS VCC f(DCOCLK) N(DCO) = 01Eh, FN_8 = FN_4 = FN_3 = FN_2 = 0, D = 2, DCOPLUS = 0 f(DCO = 2) FN 8 = FN_4 FN_8 FN 4 = FN_3 FN 3 = FN_2 FN 2 = 0, 0 DCOPLUS = 1 f(DCO = 27) FN 8 = FN_4 FN_8 FN 4 = FN_3 FN 3 = FN_2 FN 2 = 0, 0 DCOPLUS = 1 FN_8 = FN_4 = FN_3 = 0, FN_2 = 1, DCOPLUS = 1
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 Sn - Stepsize Ratio between DCO Taps electrical characteristics over recommended operating free-air temperature (unless otherwise noted) 1.17 ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ Max 1.11 1.07 1.06 Min 1 20 27 DCO Tap Figure 14.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) crystal oscillator, LFXT1, low-frequency modes (see Note 4) PARAMETER TEST CONDITIONS VCC MIN fLFXT1, LF LFXT1 oscillator crystal frequency, LF mode XTS_FLL = 0, LFXT1DIG = 0 1.8 V−3.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) crystal oscillator, XT2 oscillator (see Note 5) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT fXT2, 0 XT2 oscillator crystal frequency, mode 0 XT2Sx = 0 1.8 V − 3.6 V 0.4 1 MHz fXT2, 1 XT2 oscillator crystal frequency, mode 1 XT2Sx = 1 1.8 V − 3.6 V 1 4 MHz 1.8 V − 3.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) typical characteristics − XT2 oscillator Oscillation Allowance − Ohms 100000.00 10000.00 1000.00 XT2Sx = 2 100.00 XT2Sx = 0 XT2Sx = 1 10.00 0.10 1.00 10.00 100.00 Crystal Frequency − MHz Figure 16.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) wake-up LPM3 PARAMETER TEST CONDITIONS MIN TYP f = 1 MHz td(LPM3) f = 2 MHz Delay time MAX UNIT 6 6 VCC = 2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) Comparator_A (see Note 1) PARAMETER TEST CONDITIONS I(CC) CAON = 1 1, CARSEL = 0 0, CAREF = 0 I(Refladder/RefDiode) CAON = 1, CARSEL = 0, CAREF = 1/2/3 1/2/3, No load at P1.6/CA0 and P1.7/CA1 V(Ref025) V(Ref050) Voltage @ 0.25 V V CC MIN TYP MAX 2.2 V 25 40 3V 45 60 2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) typical characteristics REFERENCE VOLTAGE vs FREE-AIR TEMPERATURE REFERENCE VOLTAGE vs FREE-AIR TEMPERATURE 650 650 VCC = 2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) Timer_A PARAMETER fTA Timer A clock frequency Timer_A tTA, cap Timer_A, capture timing TEST CONDITIONS Internal: SMCLK, ACLK, External: TACLK TACLK, INCLK INCLK, Duty Cycle = 50% ±10% TA0, TA1, TA2 VCC MIN MAX 2.2 V 10 3V 16 UNIT MHz 2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) USCI (UART mode) PARAMETER fUSCI USCI input clock frequency fBITCLK BITCLK clock frequency (equals Baudrate in MBaud) tτ UART receive deglitch time (see Note 1) TEST CONDITIONS VCC MIN TYP Internal: SMCLK, ACLK External: UCLK Duty Cycle = 50% ± 10% 2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) 1/fUCxCLK CKPL=0 UCLK CKPL=1 tLO/HI tLO/HI tSU,MI tHD,MI SOMI tVALID,MO SIMO Figure 21. SPI Master Mode, CKPH = 0 1/fUCxCLK CKPL=0 UCLK CKPL=1 tLO/HI tLO/HI tSU,MI SOMI tVALID,MO SIMO Figure 22.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) tSTE,LEAD tSTE,LAG STE 1/fUCxCLK CKPL=0 UCLK CKPL=1 tLO/HI tLO/HI tSU,SI tHD,SI SIMO tSTE,ACC tVALID,SO tSTE,DIS SOMI Figure 23.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) USCI (I2C mode) (see Figure 25) PARAMETER fUSCI USCI input clock frequency fSCL SCL clock frequency TEST CONDITIONS VCC MIN TYP Internal: SMCLK, ACLK External: UCLK Duty cycle = 50% ± 10% 2.2 V/3 V 0 fSCL ≤ 100 kHz 2.2 V/3 V 4.0 fSCL > 100 kHz 2.2 V/3 V 0.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) SD16_A, power supply and recommended operating conditions PARAMETER AVCC Analog supply voltage ISD16 Analog supply t 1 active ti current: SD16 A channel SD16_A including internal reference fSD16 Analog front-end input clock frequency TEST CONDITIONS VCC MIN AVCC = DVCC AVSS = DVSS = 0V TYP MA
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) SD16_A, performance (fSD16 = 1MHz, SD16OSRx = 256, SD16REFON = 1) PARAMETER SINAD G Signal to noise + Signal-to-noise distortion ratio Nominal gain EOS Offset error dEOS/dT Offset error temperature coefficient CMRR Common mode rejection Common-mode ratio TEST CONDITIONS VCC MIN TYP MAX S
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) typical characteristics − SD16_A SNR/SINAD performance over OSR 100.0 SNR/SINAD − dB 95.0 90.0 SNR 85.0 SINAD 80.0 75.0 70.0 65.0 60.0 55.0 50.0 10.00 100.00 1000.00 OSR Figure 26. SNR/SINAD performance over OSR, fSD16 = 1MHz, SD16REFON = 1, SD16GAINx = 1 VIN(t) = 1.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) SD16_A, built-in voltage reference PARAMETER TEST CONDITIONS VCC VREF Internal reference voltage SD16REFON = 1, SD16VMIDON = 0 3V IREF Reference supply current SD16REFON = 1, SD16VMIDON = 0 3V TC Temperature coefficient SD16REFON = 1, SD16VMIDON = 0 (see Note 1) 3V CREF VREF load capacit
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) flash memory PARAMETER VCC(PGM/ TEST CONDITIONS VCC MIN Program and Erase supply voltage TYP 2.2 MAX UNIT 3.6 V 476 kHz 5 mA 7 mA 10 ms ERASE) fFTG Flash Timing Generator frequency IPGM Supply current from VCC during program 2.2 V/3.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 APPLICATION INFORMATION Port P1, P1.0 to P1.5, input/output with Schmitt trigger Pad Logic DVSS DVSS CAPD.x P1REN.x P1DIR.x 0 P1OUT.x 0 1 0 DVCC 1 Bus Keeper P1SEL.x EN P1IN.x EN Module X IN D P1IE.x P1IRQ.x EN Q P1IFG.x P1SEL.x P1IES.x 52 1 Direction 0: Input 1: Output 1 Module X OUT DVSS Set Interrupt Edge Select POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 P1.0/TA0 P1.1/TA0/MCLK P1.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 Port P1 (P1.0 to P1.5) pin functions (P1 X) PIN NAME (P1.X) P1.0/TA0 CONTROL BITS / SIGNALS X 0 FUNCTION P1.0 (I/O) Timer_A3.CCI0A P1.1/TA0/MCLK 1 2 3 4 5 1 0 1 1 0 X 1 P1.1 (I/O) I: 0, O: 1 0 0 Timer_A3.CCI0B 0 1 0 MCLK 1 1 0 P1.2 (I/O) X X 1 I: 0, O: 1 0 0 0 1 0 Timer_A3.TA1 1 1 0 Input buffer disabled (see Note 2) X X 1 I: 0, O: 1 0 0 Timer_B7.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 Port P1, P1.6, P1.7, input/output with Schmitt trigger Pad Logic To Comparator_A From Comparator_A CAPD.x P1REN.x P1DIR.x 0 0 Module X OUT 1 0 1 1 Direction 0: Input 1: Output 1 P1OUT.x DVSS DVCC P1.6/CA0 P1.7/CA1 Bus Keeper P1SEL.x EN P1IN.x EN Module X IN D P1IE.x P1IRQ.x EN Q P1IFG.x Set Interrupt Edge Select P1SEL.x P1IES.x Port P1 (P1.6 and P1.7) pin functions PIN NAME (P1.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 port P2, P2.0, P2.6 to P2.7, input/output with Schmitt trigger DVSS P2REN.x P2DIR.x 0 0 Module X OUT 1 0 DVCC 1 1 Direction 0: Input 1: Output 1 P2OUT.x DVSS Bus Keeper P2SEL.x P2.0/TA2 P2.6/CAOUT P2.7 EN P2IN.x EN Module X IN D P2IE.x EN P2IRQ.x Q Set P2IFG.x Interrupt Edge Select P2SEL.x P2IES.x Port P2 (P2.0, P2.6 and P2.7) pin functions PIN NAME (P2.X) (P2 X) P2.0/TA2 P2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 port P2, P2.1 to P2.3, input/output with Schmitt trigger Timer_B Output Tristate Logic P1.3/TBOUTH/SVSOUT P1SEL.3 P1DIR.3 P2REN.x P2DIR.x 0 0 Module X OUT 1 0 1 1 Direction 0: Input 1: Output 1 P2OUT.x DVSS DVCC Bus Keeper P2SEL.x P2.1/TB0 P2.2/TB1 P2.3/TB2 EN P2IN.x EN Module X IN D P2IE.x P2IRQ.x EN Q P2IFG.x P2SEL.x P2IES.x Set Interrupt Edge Select Port P2 (P2.1 to P2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 port P2, P2.4 to P2.5, input/output with Schmitt trigger DVSS P2REN.x P2DIR.x USCI Direction Control 0 P2OUT.x 0 Module X OUT 1 DVSS 0 DVCC 1 1 Direction 0: Input 1: Output 1 Bus Keeper P2SEL.x P2.4/UCA0TXD/UCA0SIMO P2.5/UCA0RXD/UCA0SOMI EN P2IN.x EN Module X IN D P2IE.x P2IRQ.x EN Q P2IFG.x P2SEL.x P2IES.x Set Interrupt Edge Select Port P2 (P2.4 and P2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 port P3, P3.0 to P3.3, input/output with Schmitt trigger Pad Logic DVSS P3REN.x P3DIR.x USCI Direction Control 0 P3OUT.x 0 Module X OUT 1 DVSS 0 DVCC 1 1 Direction 0: Input 1: Output 1 Bus Keeper P3SEL.x P3.0/UCB0STE/UCA0CLK P3.1/UCB0SIMO/UCB0SDA P3.2/UCB0SOMI/UCB0SCL P3.3/UCB0CLK/UCA0STE EN P3IN.x EN Module X IN D Port P3 (P3.0 to P3.3) pin functions PIN NAME (P3.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 port P3, P3.4 to P3.7, input/output with Schmitt trigger Pad Logic DVSS P3REN.x P3DIR.x 0 0 Module X OUT 1 0 1 1 Direction 0: Input 1: Output 1 P3OUT.x DVSS DVCC Bus Keeper P3SEL.x P3.4 P3.5 P3.6 P3.7 EN P3IN.x EN Module X IN D Port P3 (P3.4 to P3.7) pin functions PIN NAME (P3.X) (P3 X) P3.4 P3.5 P3.6 P3.7 CONTROL BITS / SIGNALS X 4 5 6 7 FUNCTION P3DIR.x P3SEL.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 port P4, P4.0 to P4.1, input/output with Schmitt trigger Pad Logic DVSS P4REN.x P4DIR.x USCI Direction Control 0 P4OUT.x 0 Module X OUT 1 DVSS 0 DVCC 1 1 Direction 0: Input 1: Output 1 Bus Keeper P4SEL.x P4.0/UCA1TXD/UCA1SIMO P4.1/UCA1RXD/UCA1SOMI EN P4IN.x EN Module X IN D Port P4 (P4.0 to P4.1) pin functions CONTROL BITS / SIGNALS PIN NAME (P4.X) (P4 X) X P4.0/ UCA1TXD/UCA1SIMO 0 P4.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 port P4, P4.2 to P4.5, input/output with Schmitt trigger Pad Logic Segment Sz LCDS... P4REN.x P4DIR.x USCI Direction Control 0 P4OUT.x 0 Module X OUT 1 DVSS 0 DVCC 1 1 Direction 0: Input 1: Output 1 P4.2/UCB1STE/UCA1CLK/S39 P4.3/UCB1SIMO/UCB1SDA/S38 P4.4/UCB1SOMI/UCB1SCL/S37 P4.5/UCB1CLK/UCA1STE/S36 Bus Keeper P4SEL.x EN P4IN.x EN Module X IN D Port P4 (P4.2 to P4.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 port P4, P4.6 to P4.7, input/output with Schmitt trigger Pad Logic Segment Sz LCDS... P4REN.x P4DIR.x 0 0 Module X OUT 1 0 1 1 Direction 0: Input 1: Output 1 P4OUT.x DVSS DVCC P4.6/S35 P4.7/S34 Bus Keeper P4SEL.x EN P4IN.x EN Module X IN D Port P4 (P4.6 to P4.7) pin functions PIN NAME (P4.X) (P4 X) CONTROL BITS / SIGNALS X P4.6/S35 6 P4.7/S34 7 FUNCTION P4.6 (I/O) S35 P4.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 port P5, P5.0, input/output with Schmitt trigger Pad Logic To SVS P5REN.x DVSS DVCC P5DIR.x 0 1 P5OUT.x DVSS 0 1 1 Direction 0: Input 1: Output 0 1 P5.0/SVSIN Bus Keeper EN P5SEL.x P5IN.x Port P5 (P5.0) pin functions PIN NAME (P5.X) (P5 X) P5.0/SVSIN CONTROL BITS / SIGNALS X 0 FUNCTION P5DIR.x P5SEL.x P5.0 (I/O) (see Note 1) I: 0, O: 1 0 SVSIN (see Notes 1, 3) X 1 NOTES: 1. X: Don’t care. 2.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 port P5, P5.1, input/output with Schmitt trigger Pad Logic Segment S0 LCDS0 P5REN.1 P5DIR.1 0 0 Module X OUT 1 0 1 1 Direction 0: Input 1: Output 1 P5OUT.1 DVSS DVCC P5.1/S0 Bus Keeper P5SEL.1 EN P5IN.1 EN Module X IN D Port P5 (P5.1) pin functions PIN NAME (P5.X) (P5 X) P5.1/S0 CONTROL BITS / SIGNALS X 1 FUNCTION P5DIR.x P5SEL.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 port P5, P5.2 to P5.7, input/output with Schmitt trigger Pad Logic LCD Signal P5REN.x P5DIR.x 0 0 DVSS 1 0 1 1 Direction 0: Input 1: Output 1 P5OUT.x DVSS DVCC Bus Keeper P5SEL.x EN P5IN.x P5.2/COM1 P5.3/COM2 P5.4/COM3 P5.5/R03 P5.6/LCDREF/R13 P5.7/R23 Port P5 (P5.2 to P5.4) pin functions PIN NAME (P5.X) (P5 X) CONTROL BITS / SIGNALS X P5.2/COM1 2 P5.3/COM2 3 P5.4/COM3 4 FUNCTION P5.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 port P7 to port P10, input/output with Schmitt trigger Pad Logic Segment Sz LCDS... PyREN.x PyDIR.x 0 0 Module X OUT 1 0 1 Py.x/Sz Bus Keeper PySEL.x EN PyIN.x EN Module X IN 66 1 Direction 0: Input 1: Output 1 PyOUT.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 Port P7 (P7.0 to P7.1) pin functions (P7 X) PIN NAME (P7.X) P7.0/S33 CONTROL BITS / SIGNALS X 0 FUNCTION P7.0 (I/O) S33 P7.1/S32 1 P7.1 (I/O) S32 P7DIR.x P7SEL.x LCDS32 I: 0, O: 1 0 0 X X 1 I: 0, O: 1 0 0 X X 1 NOTES: 1. X: Don’t care. Port P7 (P7.4 to P7.5) pin functions PIN NAME (P7.X) (P7 X) P7.2/S31 CONTROL BITS / SIGNALS X 2 FUNCTION P7.2 (I/O) S31 P7.3/S30 3 P7.3 (I/O) S30 P7.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 Port P8 (P8.0 to P8.1) pin functions (P8 X) PIN NAME (P8.X) P8.0/S25 CONTROL BITS / SIGNALS X 0 FUNCTION P8.0 (I/O) S25 P8.1/S24 1 P8.0 (I/O) S24 P8DIR.x P8SEL.x LCDS24 I: 0, O: 1 0 0 X X 1 I: 0, O: 1 0 0 X X 1 NOTES: 1. X: Don’t care. Port P8 (P8.2 to P8.5) pin functions PIN NAME (P8.X) (P8 X) P8.2/S23 CONTROL BITS / SIGNALS X 2 FUNCTION P8.2 (I/O) S23 P8.3/S22 3 P8.3 (I/O) S22 P8.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 Port P9 (P9.0 to P9.1) pin functions (P9 X) PIN NAME (P9.X) P9.0/S17 CONTROL BITS / SIGNALS X 0 FUNCTION P9.0 (I/O) S17 (see Note 1) P9.1/S16 1 P9.1 (I/O) S16 (see Note 1) P9DIR.x P9SEL.x LCDS16 I: 0, O: 1 0 0 X X 1 I: 0, O: 1 0 0 X X 1 NOTES: 1. X: Don’t care. Port P9 (P9.2 to P9.5) pin functions PIN NAME (P9.X) (P9 X) P9.2/S15 CONTROL BITS / SIGNALS X 2 FUNCTION P9.2 (I/O) S15 P9.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 Port P10 (P10.0 to P10.1) pin functions X) PIN NAME (P10 (P10.X) P10.0/S8 CONTROL BITS / SIGNALS X 0 FUNCTION P10.0 (I/O) S8 P10.1/S7 1 P10.1 (I/O) S7 P10DIR.x P10SEL.x LCDS8 I: 0, O: 1 0 0 X X 1 I: 0, O: 1 0 0 X X 1 NOTES: 1. X: Don’t care. Port P10 (P10.2 to P10.5) pin functions PIN NAME (P10 (P10.X) X) P10.2/S7 CONTROL BITS / SIGNALS X 2 FUNCTION P10.2 (I/O) S7 P10.3/S6 3 P10.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 JTAG pins (TMS, TCK, TDI/TCLK, TDO/TDI), input/output with Schmitt trigger or output TDO Controlled by JTAG Controlled by JTAG TDO/TDI JTAG Controlled by JTAG DVCC TDI Burn and Test Fuse TDI/TCLK Test and Emulation DVCC TMS Module TMS DVCC TCK TCK RST/NMI Tau ~ 50 ns Brownout TCK POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 G D U S G D U S 71
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 JTAG fuse check mode Devices that have the fuse on the TDI/TCLK terminal have a fuse check mode that tests the continuity of the fuse the first time the JTAG port is accessed after a power-on reset (POR). When activated, a fuse-check current (I(TF) ) of 1 mA at 3 V can flow from the TDI/TCLK pin to ground if the fuse is not burned.
MSP430F47x3, MSP430F47x4 MIXED SIGNAL MICROCONTROLLER SLAS545C − MAY 2007 − REVISED MARCH 2011 Data Sheet Revision History Literature Number Summary SLAS545 PRODUCT PREVIEW data sheet SLAS545A PRODUCTION DATA data sheet SLAS545B Section DEVELOPMENT TOOL SUPPORT added, page 2. Split XT1 frequency ranges depending on supply voltage range, page 36. Added parameter fLFXT1, LF, logic to LFXT1, low frequency modes characteristics, page 36.
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PACKAGE MATERIALS INFORMATION www.ti.com 10-Nov-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant MSP430F4783IPZR LQFP PZ 100 1000 330.0 24.4 17.0 17.0 2.1 20.0 24.0 Q2 MSP430F4784IPZR LQFP PZ 100 1000 330.0 24.4 17.0 17.0 2.1 20.0 24.0 Q2 MSP430F4793IPZR LQFP PZ 100 1000 330.0 24.4 17.0 17.0 2.1 20.0 24.
PACKAGE MATERIALS INFORMATION www.ti.com 10-Nov-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) MSP430F4783IPZR LQFP PZ 100 1000 367.0 367.0 45.0 MSP430F4784IPZR LQFP PZ 100 1000 367.0 367.0 45.0 MSP430F4793IPZR LQFP PZ 100 1000 367.0 367.0 45.0 MSP430F4794IPZR LQFP PZ 100 1000 367.0 367.0 45.
MECHANICAL DATA MTQF013A – OCTOBER 1994 – REVISED DECEMBER 1996 PZ (S-PQFP-G100) PLASTIC QUAD FLATPACK 0,27 0,17 0,50 75 0,08 M 51 76 50 100 26 1 0,13 NOM 25 12,00 TYP Gage Plane 14,20 SQ 13,80 16,20 SQ 15,80 0,05 MIN 1,45 1,35 0,25 0°– 7° 0,75 0,45 Seating Plane 0,08 1,60 MAX 4040149 /B 11/96 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C.
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