Datasheet

MSP430F471x3, MSP430F471x6, MSP430F471x7
MIXED SIGNAL MICROCONTROLLER
SLAS626C -- OCTOBER 2008 -- REVISED MARCH 2011
49
POST OFFICE BOX 655303  DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
USCI (UART mode) -- recommended operating conditions
PARAMETER CONDITIONS MIN MAX UNIT
f
USCI
USCI input clock frequency
Internal: SMCLK, ACLK
External: UCLK
Duty cycle = 50%  10%
f
SYSTEM
MHz
f
BITCLK
BITCLK clock frequency
(equals baud rate in MBaud)
1 MHz
USCI (UART mode)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
t
U
A
RT receive de
g
litch time
2.2 V 50 150 600 ns
t

U
A
R
T
r
e
c
e
i
v
e
d
e
g
l
i
t
c
h
t
i
m
e
(see Note 1)
3V 50 100 600 ns
NOTES: 1. Pulses on the UART receive input (UCxRX) shorter than the UART receive deglitch time are suppressed. To ensure that pulses are
correctly recognized their width should exceed the maximum specification of the deglitch time.
USCI (SPI master mode) -- recommended operating conditions
PARAMETER CONDITIONS MIN MAX UNIT
f
USCI
USCI input clock frequency
SMCLK, ACLK
Duty cycle = 50%  10%
f
SYSTEM
MHz
USCI (SPI master mode) (see Note 1, Figure 21, and Figure 22)
PARAMETER TEST CONDITIONS V
CC
MIN MAX UNIT
f
USCI
USCI input clock frequency
SMCLK, ACLK
Duty cycle = 50%  10%
f
SYSTEM
MHz
t
S
O
M
I
i
n
p
u
t
d
a
t
a
s
e
t
u
p
t
i
m
e
2.2 V 110 ns
t
SU,MI
SOMI input data setup time
3V 75 ns
t
S
O
M
I
i
n
p
u
t
d
a
t
a
h
o
l
d
t
i
m
e
2.2 V 0 ns
t
HD,MI
SOMI input data hold time
3V 0 ns
t
S
I
M
O
o
u
t
p
u
t
d
a
t
a
v
a
l
i
d
t
i
m
e
(
N
o
t
e
2
)
UCLK ed
g
etoSIMOvalid,
2.2 V 30 ns
t
VALID,MO
SIMO output data valid time (Note 2)
U
C
L
K
e
d
g
e
t
o
S
I
M
O
v
a
l
i
d
,
C
L
=20pF
3V 20 ns
t
S
I
M
O
o
u
t
p
u
t
d
a
t
a
h
o
l
d
t
i
m
e
(
N
o
t
e
3
)
C
2
0
p
F
2.2 V 0 ns
t
HD,MO
SIMO output data hold time (Note 3) C
L
=20pF
3V 0 ns
NOTES: 1. f
UCxCLK
=
1
2t
LO∕HI
with t
LO∕HI
≥ max(t
VALID,MO(USCI)
+ t
SU,SI(Slave),
t
SU,MI(USCI)
+ t
VALID,SO(Slave)
).
For the slave’s parameters t
SU,SI(Slave)
and t
VALID,SO(Slave)
refer to the SPI parameters of the attached slave.
2. Specifies the time to drive the next valid data to the SIMO output after the output changing UCLK clock edge. Refer to the timing
diagrams in Figure 21 and Figure 22.
3. Specifies how long data on the SIMO output is valid after the output changing UCLK clock edge. Negative values indicate that the
data on the SIMO output can become i nvalid before the output changing clock edge observed on UCLK. Refer to the timing diagrams
in Figure 21 and Figure 22.