Datasheet

MSP430F471x3, MSP430F471x6, MSP430F471x7
MIXED SIGNAL MICROCONTROLLER
SLAS626C -- OCTOBER 2008 -- REVISED MARCH 2011
58
POST OFFICE BOX 655303  DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
flash memory
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
V
CC(PGM/
ERASE)
Program and erase supply voltage 2.2 3.6 V
f
FTG
Flash timing generator frequency 257 476 kHz
I
PGM
Supply current from V
CC
during program 2.2 V/3.6 V 3 5 mA
I
ERASE
Supply current from V
CC
during erase 2.2 V/3.6 V 3 7 mA
t
CPT
Cumulative program time (see Note 1) 2.2 V/3.6 V 10 ms
t
CMErase
Cumulative mass erase time 2.2 V/3.6 V 20 ms
Program/Erase endurance 10
4
10
5
cycles
t
Retention
Data retention duration T
J
=25C 100 years
t
Word
Word or byte program time 30 t
FTG
t
Block, 0
Block program time for 1
st
byte or word 25 t
FTG
t
Block, 1-63
Block program time for each additional byte or word
s
e
e
N
o
t
e
2
18 t
FTG
t
Block, End
Block program end-sequence wait time
seeNote2
6 t
FTG
t
Mass Erase
Mass erase time 10593 t
FTG
t
Seg Erase
Segment erase time 4819 t
FTG
f
MCLK,MGR
MCLK frequency in marginal read mode
(FCTL4.MGR0 = 1 or FCTL4.MGR1 = 1)
0 1 MHz
NOTES: 1. The cumulative program time must not be exceeded when writing to a 64-byte flash block. This parameter applies to all programming
methods: individual word/byte write and block write modes.
2. These values are hardwired into the Flash Controller ’s state machine (t
FTG
=1/f
FTG
).
RAM
PARAMETER TEST CONDITIONS MIN MAX UNIT
V
(RAMh)
RAM retention supply voltage (see Note 1) CPU halted 1.6 V
NOTE 1: This parameter defines the minimum supply voltage V
CC
when the data in RAM remains unchanged. No program execution should
happen during this supply voltage condition.
JTAG interface
PARAMETER
TEST
CONDITIONS
V
CC
MIN TYP MAX UNIT
f
T
C
K
i
n
p
t
f
r
e
q
e
n
c
S
e
e
N
o
t
e
1
2.2 V 0 5 MHz
f
TCK
TCK input
f
requency See Note 1
3V 0 10 MHz
R
Internal
Internal pullup resistance on TMS, TCK, TDI/TCLK SeeNote2 2.2 V/ 3 V 25 40 90 k
NOTES: 1. f
TCK
may be restricted to meet the timing requirements of the module selected.
2. TMS, TDI/TCLK, and TCK pull-up resistors are implemented in all versions.
JTAG fuse (see Note 1)
PARAMETER
TEST
CONDITIONS
V
CC
MIN NOM MAX UNIT
V
CC(FB)
Supply voltage during fuse-blow condition T
A
=25C 2.5 V
V
FB
Voltage level on TDI/TCLK for fuse-blow: F versions 6 7 V
I
FB
Supply current into TDI/TCLK during fuse blow 100 mA
t
FB
Time to blow fuse 1 ms
NOTES: 1. Once the fuse is blown, no further access to the MSP430 JTAG/test and emulation features is possible. The JTAG block is switched
to bypass mode.