Datasheet

MSP430F261x
MSP430F241x
www.ti.com SLAS541K –JUNE 2007–REVISED NOVEMBER 2012
Timer_A3
Timer_A3 is a 16-bit timer/counter with three capture/compare registers. Timer_A3 can support multiple
capture/compares, PWM outputs, and interval timing. Timer_A3 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
Table 12. Timer_A3 Signal Connections
INPUT PIN NUMBER MODULE OUTPUT PIN NUMBER
DEVICE INPUT MODULE MODULE
OUTPUT
SIGNAL INPUT NAME BLOCK
ZQW PM, PN PM, PN ZQW
SIGNAL
G2 - P1.0 12 - P1.0 TACLK TACLK Timer NA
ACLK ACLK
SMCLK SMCLK
M2 - P2.1 21 - P2.1 TAINCLK INCLK
H1 - P1.1 13 - P1.1 TA0 CCI0A CCR0 TA0 13 - P1.1 H1 - P1.1
M3 - P2.2 22 - P2.2 TA0 CCI0B 17 - P1.5 K1 - P1.5
DV
SS
GND 27 - P2.7 L5 - P2.7
DV
CC
V
CC
H2 - P1.2 14 - P1.2 TA1 CCI1A CCR1 TA1 14 - P1.2 H2 - P1.2
CAOUT CCI1B 18 - P1.6 K2 - P1.6
(internal)
DV
SS
GND 23 - P2.3 L3 - P2.3
DV
CC
V
CC
ADC12 (internal)
DAC12_0 (internal)
DAC12_1 (internal)
J1 - P1.3 15 - P1.3 TA2 CCI2A CCR2 TA2 15 - P1.3 J1 - P1.3
ACLK (internal) CCI2B 19 - P1.7 L1 - P1.7
DV
SS
GND 24 - P2.4 L4 - P2.4
DV
CC
V
CC
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