Datasheet

MSP430F23x0
MIXED SIGNAL MICROCONTROLLER
SLAS518A -- AUGUST 2006 -- REVISED MAY 2007
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram
MSP430F23x0
Basic Clock
System+
Brownout
Protection
RST/NMI
DVCC D/AVSS
MCLK
Watchdog
WDT+
15-Bit
Timer_A3
3 CC
Registers
16MHz
CPU
incl. 16
Registers
Emulation
JTAG
Interface
Ports
P1/P2
2x8 I/O
Interrupt
capability
Comp_A+
8
Channels
Hardware
Multiplier
MPY,
MPYS,
MAC,
MACS
Timer_B3
3 CC
Registers
Ports
P3/P4
2x8 I/O
AVCC P1.x/P2.x
2x8
P3.x/P4.x
2x8
SMCLK
ACLK
MDB
MAB
XIN XOUT
RAM
2kB
2kB
1kB
Flash
32kB
16kB
8kB
USCI A0:
UART
IrDA, SPI
USCI B0:
SPI, I2C