Datasheet

Oscillators
Basic Clock
System+
RAM
2kB
4kB
4kB
BOR
SVS/SVM
RST/NMI
DVCC
DVSS
MCLK
Watchdog
WDT+
15/16-Bit
Timer_A3
3 CC
Registers
16MHz
CPU
incl. 16
Registers
Emulation
XOUT/
XT2OUT
JTAG
Interface
Ports
P1/P2
2x8 I/O
Interrupt
capability
USCI A0
UART/LIN,
IrDA, SPI
USCI B0
SPI, I2C
Comp_A+
Flash
60kB
48kB
32kB
Timer_B7
7 CC
Registers,
Shadow
Reg
Ports
P3/P4
P5/P6
4x8 I/O
AVCC
AVSS
P1.x/P2.x
2x8
P3.x/P4.x
P5.x/P6.x
4x8
XIN/
XT2IN
22
SMCLK
ACLK
MDB
MAB
Hardware
Multiplier
MPY,
MPYS,
MAC,
MACS
USCI A1
UART/LIN,
IrDA, SPI
USCI B1
SPI, I2C
MSP430F23x
MSP430F24x(1)
MSP430F2410
SLAS547I –JUNE 2007–REVISED DECEMBER 2012 www.ti.com
Functional Block Diagram, MSP430F24x1
8 Submit Documentation Feedback Copyright © 2007–2012, Texas Instruments Incorporated