Datasheet

MSP430F22x2
MSP430F22x4
SLAS504G –JULY 2006–REVISED AUGUST 2012 www.ti.com
Timer_A3
Timer_A3 is a 16-bit timer/counter with three capture/compare registers. Timer_A3 can support multiple
capture/compares, PWM outputs, and interval timing. Timer_A3 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
Table 15. Timer_A3 Signal Connections
INPUT PIN NUMBER DEVICE MODULE MODULE OUTPUT PIN NUMBER
MODULE
INPUT INPUT OUTPUT
BLOCK
DA RHA YFF DA RHA YFF
SIGNAL NAME SIGNAL
31 - P1.0 29 - P1.0 F2 - P1.0 TACLK TACLK Timer NA
ACLK ACLK
SMCLK SMCLK
9 - P2.1 7 - P2.1 B4 - P2.1 TAINCLK INCLK
32 - P1.1 30 - P1.1 G2 - P1.1 TA0 CCI0A CCR0 TA0 32 - P1.1 30 - P1.1 G2 - P1.1
10 - P2.2 8 - P2.2 A5 - P2.2 TA0 CCI0B 10 - P2.2 8 - P2.2 A5 - P2.2
V
SS
GND 36 - P1.5 34 - P1.5 E1 - P1.5
V
CC
V
CC
33 - P1.2 31 - P1.2 E2 - P1.2 TA1 CCI1A CCR1 TA1 33 - P1.2 31 - P1.2 E2 - P1.2
29 - P2.3 27 - P2.3 F3 - P2.3 TA1 CCI1B 29 - P2.3 27 - P2.3 F3 - P2.3
V
SS
GND 37 - P1.6 35 - P1.6 E3 - P1.6
V
CC
V
CC
34 - P1.3 32 - P1.3 G1 - P1.3 TA2 CCI2A CCR2 TA2 34 - P1.3 32 - P1.3 G1 - P1.3
ACLK
CCI2B 30 - P2.4 28 - P2.4 G3 - P2.4
(internal)
V
SS
GND 38 - P1.7 36 - P1.7 D2 - P1.7
V
CC
V
CC
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